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SelectionDAG: Add sext_inreg optimizations
v2: use dyn_cast fixup comments v3: use cast Reviewed-by: Matt Arsenault <arsenm2@gmail.com> Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220044 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1680,6 +1680,17 @@ SDValue DAGCombiner::visitADD(SDNode *N) {
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return DAG.getNode(ISD::SUB, DL, VT, N1, ZExt);
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}
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// add X, (sextinreg Y i1) -> sub X, (and Y 1)
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if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) {
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VTSDNode *TN = cast<VTSDNode>(N1.getOperand(1));
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if (TN->getVT() == MVT::i1) {
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SDLoc DL(N);
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SDValue ZExt = DAG.getNode(ISD::AND, DL, VT, N1.getOperand(0),
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DAG.getConstant(1, VT));
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return DAG.getNode(ISD::SUB, DL, VT, N0, ZExt);
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}
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}
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return SDValue();
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}
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@ -1845,6 +1856,17 @@ SDValue DAGCombiner::visitSUB(SDNode *N) {
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VT);
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}
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// sub X, (sextinreg Y i1) -> add X, (and Y 1)
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if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) {
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VTSDNode *TN = cast<VTSDNode>(N1.getOperand(1));
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if (TN->getVT() == MVT::i1) {
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SDLoc DL(N);
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SDValue ZExt = DAG.getNode(ISD::AND, DL, VT, N1.getOperand(0),
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DAG.getConstant(1, VT));
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return DAG.getNode(ISD::ADD, DL, VT, N0, ZExt);
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}
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}
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return SDValue();
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}
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26
test/CodeGen/R600/sext-eliminate.ll
Normal file
26
test/CodeGen/R600/sext-eliminate.ll
Normal file
@ -0,0 +1,26 @@
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; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}sext_in_reg_i1_i32_add:
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; EG: MEM_{{.*}} STORE_{{.*}} [[RES:T[0-9]+\.[XYZW]]], [[ADDR:T[0-9]+.[XYZW]]]
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; EG: SUB_INT {{[* ]*}}[[RES]]
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; EG-NOT: BFE
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define void @sext_in_reg_i1_i32_add(i32 addrspace(1)* %out, i1 %a, i32 %b) {
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%sext = sext i1 %a to i32
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%res = add i32 %b, %sext
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store i32 %res, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}sext_in_reg_i1_i32_sub:
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; EG: MEM_{{.*}} STORE_{{.*}} [[RES:T[0-9]+\.[XYZW]]], [[ADDR:T[0-9]+.[XYZW]]]
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; EG: ADD_INT {{[* ]*}}[[RES]]
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; EG-NOT: BFE
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define void @sext_in_reg_i1_i32_sub(i32 addrspace(1)* %out, i1 %a, i32 %b) {
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%sext = sext i1 %a to i32
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%res = sub i32 %b, %sext
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store i32 %res, i32 addrspace(1)* %out
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ret void
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}
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