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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-12 13:30:51 +00:00
Add support for C++ exception handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132131 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -55,6 +55,20 @@ bool Inserter::runOnMachineFunction(MachineFunction &F) {
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MachineBasicBlock& MBB = *MFI;
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MachineBasicBlock::iterator I = MFI->begin();
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// If MBB is a landing pad, insert instruction that restores $gp after
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// EH_LABEL.
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if (MBB.isLandingPad()) {
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// Find EH_LABEL first.
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for (; I->getOpcode() != TargetOpcode::EH_LABEL; ++I) ;
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// Insert lw.
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++I;
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DebugLoc dl = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
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BuildMI(MBB, I, dl, TII->get(Mips::LW), Mips::GP).addImm(0)
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.addFrameIndex(FI);
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Changed = true;
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}
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while (I != MFI->end()) {
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if (I->getOpcode() != Mips::JALR) {
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++I;
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@ -182,8 +182,6 @@ void MipsFrameLowering::emitPrologue(MachineFunction &MF) const {
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if (ATUsed)
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BuildMI(MBB, MBBI, dl, TII.get(Mips::ATMACRO));
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// if framepointer enabled, set it to point to the stack pointer.
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if (hasFP(MF)) {
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// Find the instruction past the last instruction that saves a callee-saved
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// register to the stack.
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const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
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@ -191,15 +189,42 @@ void MipsFrameLowering::emitPrologue(MachineFunction &MF) const {
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for (unsigned i = 0; i < CSI.size(); ++i)
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++MBBI;
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// if framepointer enabled, set it to point to the stack pointer.
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if (hasFP(MF))
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// Insert instruction "move $fp, $sp" at this location.
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BuildMI(MBB, MBBI, dl, TII.get(Mips::ADDu), Mips::FP)
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.addReg(Mips::SP).addReg(Mips::ZERO);
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}
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// Restore GP from the saved stack location
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if (MipsFI->needGPSaveRestore())
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BuildMI(MBB, MBBI, dl, TII.get(Mips::CPRESTORE))
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.addImm(MFI->getObjectOffset(MipsFI->getGPFI()));
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// EH Frame infomation.
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MachineModuleInfo &MMI = MF.getMMI();
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std::vector<MachineMove> &Moves = MMI.getFrameMoves();
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MCSymbol *FrameLabel = MMI.getContext().CreateTempSymbol();
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BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL)).addSym(FrameLabel);
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if (hasFP(MF)) {
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MachineLocation SPDst(Mips::FP);
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MachineLocation SPSrc(Mips::SP);
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Moves.push_back(MachineMove(FrameLabel, SPDst, SPSrc));
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}
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if (StackSize) {
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MachineLocation SPDst(MachineLocation::VirtualFP);
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MachineLocation SPSrc(MachineLocation::VirtualFP, -StackSize);
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Moves.push_back(MachineMove(FrameLabel, SPDst, SPSrc));
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}
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for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
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E = CSI.end(); I != E; ++I) {
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int64_t Offset = MFI->getObjectOffset(I->getFrameIdx());
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MachineLocation CSDst(MachineLocation::VirtualFP, Offset);
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MachineLocation CSSrc(I->getReg());
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Moves.push_back(MachineMove(FrameLabel, CSDst, CSSrc));
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}
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}
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void MipsFrameLowering::emitEpilogue(MachineFunction &MF,
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@ -243,6 +268,13 @@ void MipsFrameLowering::emitEpilogue(MachineFunction &MF,
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}
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}
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void
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MipsFrameLowering::getInitialFrameState(std::vector<MachineMove> &Moves) const {
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MachineLocation Dst(MachineLocation::VirtualFP);
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MachineLocation Src(Mips::SP, 0);
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Moves.push_back(MachineMove(0, Dst, Src));
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}
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void MipsFrameLowering::
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processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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RegScavenger *RS) const {
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@ -39,6 +39,8 @@ public:
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bool hasFP(const MachineFunction &MF) const;
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void getInitialFrameState(std::vector<MachineMove> &Moves) const;
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void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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RegScavenger *RS) const;
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};
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@ -141,7 +141,8 @@ MipsTargetLowering(MipsTargetMachine &TM)
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setOperationAction(ISD::FLOG10, MVT::f32, Expand);
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setOperationAction(ISD::FEXP, MVT::f32, Expand);
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setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
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setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand);
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setOperationAction(ISD::EHSELECTION, MVT::i32, Expand);
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setOperationAction(ISD::VAARG, MVT::Other, Expand);
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setOperationAction(ISD::VACOPY, MVT::Other, Expand);
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@ -176,6 +177,9 @@ MipsTargetLowering(MipsTargetMachine &TM)
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setStackPointerRegisterToSaveRestore(Mips::SP);
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computeRegisterProperties();
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setExceptionPointerRegister(Mips::A0);
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setExceptionSelectorRegister(Mips::A1);
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}
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MVT::SimpleValueType MipsTargetLowering::getSetCCResultType(EVT VT) const {
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@ -17,11 +17,15 @@ using namespace llvm;
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MipsMCAsmInfo::MipsMCAsmInfo(const Target &T, StringRef TT) {
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AlignmentIsInBytes = false;
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Data16bitsDirective = "\t.half\t";
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Data32bitsDirective = "\t.word\t";
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Data32bitsDirective = "\t.4byte\t";
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Data64bitsDirective = 0;
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PrivateGlobalPrefix = "$";
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CommentString = "#";
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ZeroDirective = "\t.space\t";
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GPRel32Directive = "\t.gpword\t";
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WeakRefDirective = "\t.weak\t";
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SupportsDebugInformation = true;
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ExceptionsType = ExceptionHandling::DwarfCFI;
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HasLEB128 = true;
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}
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@ -283,8 +283,7 @@ getEHHandlerRegister() const {
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int MipsRegisterInfo::
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getDwarfRegNum(unsigned RegNum, bool isEH) const {
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llvm_unreachable("What is the dwarf register number");
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return -1;
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return MipsGenRegisterInfo::getDwarfRegNumFull(RegNum, 0);
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}
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#include "MipsGenRegisterInfo.inc"
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@ -8,14 +8,14 @@ entry:
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ret i8* %x
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}
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; CHECK-PIC: lw $[[R0:[0-9]+]], %got($tmp1)($gp)
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; CHECK-PIC: addiu ${{[0-9]+}}, $[[R0]], %lo($tmp1)
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; CHECK-PIC: lw $[[R1:[0-9]+]], %got($tmp2)($gp)
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; CHECK-PIC: addiu ${{[0-9]+}}, $[[R1]], %lo($tmp2)
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; CHECK-STATIC: lui $[[R2:[0-9]+]], %hi($tmp1)
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; CHECK-STATIC: addiu ${{[0-9]+}}, $[[R2]], %lo($tmp1)
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; CHECK-STATIC: lui $[[R3:[0-9]+]], %hi($tmp2)
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; CHECK-STATIC: addiu ${{[0-9]+}}, $[[R3]], %lo($tmp2)
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; CHECK-PIC: lw $[[R0:[0-9]+]], %got($tmp[[T0:[0-9]+]])($gp)
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; CHECK-PIC: addiu ${{[0-9]+}}, $[[R0]], %lo($tmp[[T0]])
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; CHECK-PIC: lw $[[R1:[0-9]+]], %got($tmp[[T1:[0-9]+]])($gp)
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; CHECK-PIC: addiu ${{[0-9]+}}, $[[R1]], %lo($tmp[[T1]])
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; CHECK-STATIC: lui $[[R2:[0-9]+]], %hi($tmp[[T0:[0-9]+]])
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; CHECK-STATIC: addiu ${{[0-9]+}}, $[[R2]], %lo($tmp[[T0]])
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; CHECK-STATIC: lui $[[R3:[0-9]+]], %hi($tmp[[T1:[0-9]+]])
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; CHECK-STATIC: addiu ${{[0-9]+}}, $[[R3]], %lo($tmp[[T1]])
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define void @f() nounwind {
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entry:
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%call = tail call i8* @dummy(i8* blockaddress(@f, %baz))
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