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ARM assembly parsing and encoding for BLX (immediate).

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Add parsing support for BLX (immediate). Since the register operand version is
predicated and the label operand version is not, we have to use some special
handling to get the operand list right for matching.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136406 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
2011-07-28 21:57:55 +00:00
parent d1e38dfb8d
commit cf121c35c4
3 changed files with 16 additions and 3 deletions
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test/MC/ARM/basic-arm-instructions.s
+3 -1
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@@ -358,10 +358,12 @@ Lforward:
@------------------------------------------------------------------------------
bl _bar
@ FIXME: blx _bar
blx _bar
@ CHECK: bl _bar @ encoding: [A,A,A,0xeb]
@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbranch
@ CHECK: blx _bar @ encoding: [A,A,A,0xfa]
@ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbranch
@------------------------------------------------------------------------------
@ BLX (register)