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Reverse order of memory arguments

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70734 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov 2009-05-03 13:09:40 +00:00
parent aecfa7897f
commit cf14ae5500
3 changed files with 14 additions and 14 deletions
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12
lib/Target/MSP430/MSP430AsmPrinter.cpp
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@ -161,22 +161,22 @@ void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int OpNum, void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int OpNum,
const char* Modifier) { const char* Modifier) {
const MachineOperand &Disp = MI->getOperand(OpNum); const MachineOperand &Base = MI->getOperand(OpNum);
const MachineOperand &Base = MI->getOperand(OpNum+1); const MachineOperand &Disp = MI->getOperand(OpNum+1);
if (Disp.isGlobal()) if (Base.isGlobal())
printOperand(MI, OpNum, "mem"); printOperand(MI, OpNum, "mem");
else if (Disp.isImm() && !Base.getReg()) else if (Disp.isImm() && !Base.getReg())
printOperand(MI, OpNum); printOperand(MI, OpNum);
else if (Base.getReg()) { else if (Base.getReg()) {
if (Disp.getImm()) { if (Disp.getImm()) {
printOperand(MI, OpNum, "nohash"); printOperand(MI, OpNum + 1, "nohash");
O << '('; O << '(';
printOperand(MI, OpNum + 1); printOperand(MI, OpNum);
O << ')'; O << ')';
} else { } else {
O << '@'; O << '@';
printOperand(MI, OpNum + 1); printOperand(MI, OpNum);
} }
} else } else
assert(0 && "Unsupported memory operand"); assert(0 && "Unsupported memory operand");

12
lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
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@ -57,7 +57,7 @@ namespace {
private: private:
SDNode *Select(SDValue Op); SDNode *Select(SDValue Op);
bool SelectAddr(SDValue Op, SDValue Addr, SDValue &Disp, SDValue &Base); bool SelectAddr(SDValue Op, SDValue Addr, SDValue &Base, SDValue &Disp);
#ifndef NDEBUG #ifndef NDEBUG
unsigned Indent; unsigned Indent;
@ -74,7 +74,7 @@ FunctionPass *llvm::createMSP430ISelDag(MSP430TargetMachine &TM) {
// FIXME: This is pretty dummy routine and needs to be rewritten in the future. // FIXME: This is pretty dummy routine and needs to be rewritten in the future.
bool MSP430DAGToDAGISel::SelectAddr(SDValue Op, SDValue Addr, bool MSP430DAGToDAGISel::SelectAddr(SDValue Op, SDValue Addr,
SDValue &Disp, SDValue &Base) { SDValue &Base, SDValue &Disp) {
// We don't support frame index stuff yet. // We don't support frame index stuff yet.
if (isa<FrameIndexSDNode>(Addr)) if (isa<FrameIndexSDNode>(Addr))
return false; return false;
@ -100,17 +100,17 @@ bool MSP430DAGToDAGISel::SelectAddr(SDValue Op, SDValue Addr,
case MSP430ISD::Wrapper: case MSP430ISD::Wrapper:
SDValue N0 = Addr.getOperand(0); SDValue N0 = Addr.getOperand(0);
if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) { if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) {
Base = CurDAG->getRegister(0, MVT::i16); Base = CurDAG->getTargetGlobalAddress(G->getGlobal(),
Disp = CurDAG->getTargetGlobalAddress(G->getGlobal(),
MVT::i16, G->getOffset()); MVT::i16, G->getOffset());
Disp = CurDAG->getTargetConstant(0, MVT::i16);
return true; return true;
} }
break; break;
}; };
Base = CurDAG->getRegister(0, MVT::i16); Base = Addr;
Disp = Addr; Disp = CurDAG->getTargetConstant(0, MVT::i16);
return true; return true;
} }

4
lib/Target/MSP430/MSP430InstrInfo.td
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@ -52,12 +52,12 @@ def MSP430Wrapper : SDNode<"MSP430ISD::Wrapper", SDT_MSP430Wrapper>;
// Address operands // Address operands
def memsrc : Operand<i16> { def memsrc : Operand<i16> {
let PrintMethod = "printSrcMemOperand"; let PrintMethod = "printSrcMemOperand";
let MIOperandInfo = (ops i16imm, GR16); let MIOperandInfo = (ops GR16, i16imm);
} }
def memdst : Operand<i16> { def memdst : Operand<i16> {
let PrintMethod = "printSrcMemOperand"; let PrintMethod = "printSrcMemOperand";
let MIOperandInfo = (ops i16imm, GR16); let MIOperandInfo = (ops GR16, i16imm);
} }