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misched prep: rename InsertPos to End.

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ScheduleDAGInstrs knows nothing about how instructions will be moved or inserted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152256 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick
2012-03-07 23:00:52 +00:00
parent 953be893e8
commit cf46b5acfd
4 changed files with 20 additions and 22 deletions
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lib/CodeGen/ScheduleDAGInstrs.cpp
+5 -5
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@@ -160,8 +160,8 @@ void ScheduleDAGInstrs::enterRegion(MachineBasicBlock *bb,
unsigned endcount) {
BB = bb;
Begin = begin;
InsertPos = end;
InsertPosIndex = endcount;
End = end;
EndIndex = endcount;
// Check to see if the scheduler cares about latencies.
UnitLatencies = forceUnitLatencies();
@@ -184,7 +184,7 @@ void ScheduleDAGInstrs::exitRegion() {
/// are too high to be hidden by the branch or when the liveout registers
/// used by instructions in the fallthrough block.
void ScheduleDAGInstrs::addSchedBarrierDeps() {
MachineInstr *ExitMI = InsertPos != BB->end() ? &*InsertPos : 0;
MachineInstr *ExitMI = End != BB->end() ? &*End : 0;
ExitSU.setInstr(ExitMI);
bool AllDepKnown = ExitMI &&
(ExitMI->isCall() || ExitMI->isBarrier());
@@ -476,7 +476,7 @@ void ScheduleDAGInstrs::initSUnits() {
// which is contained within a basic block.
SUnits.reserve(BB->size());
for (MachineBasicBlock::iterator I = Begin; I != InsertPos; ++I) {
for (MachineBasicBlock::iterator I = Begin; I != End; ++I) {
MachineInstr *MI = I;
if (MI->isDebugValue())
continue;
@@ -534,7 +534,7 @@ void ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA) {
// Walk the list of instructions, from bottom moving up.
MachineInstr *PrevMI = NULL;
for (MachineBasicBlock::iterator MII = InsertPos, MIE = Begin;
for (MachineBasicBlock::iterator MII = End, MIE = Begin;
MII != MIE; --MII) {
MachineInstr *MI = prior(MII);
if (MI && PrevMI) {