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For now, restrict FastISel to instructions that only involve one

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register class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55008 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2008-08-19 20:58:14 +00:00
parent d1d2ee8ccb
commit cf711aa5b6
1 changed files with 6 additions and 2 deletions
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8
utils/TableGen/FastISelEmitter.cpp
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@ -62,7 +62,8 @@ struct OperandsSignature {
/// ///
bool initialize(TreePatternNode *InstPatNode, bool initialize(TreePatternNode *InstPatNode,
const CodeGenTarget &Target, const CodeGenTarget &Target,
MVT::SimpleValueType VT) { MVT::SimpleValueType VT,
const CodeGenRegisterClass *DstRC) {
for (unsigned i = 0, e = InstPatNode->getNumChildren(); i != e; ++i) { for (unsigned i = 0, e = InstPatNode->getNumChildren(); i != e; ++i) {
TreePatternNode *Op = InstPatNode->getChild(i); TreePatternNode *Op = InstPatNode->getChild(i);
if (!Op->isLeaf()) if (!Op->isLeaf())
@ -82,6 +83,9 @@ struct OperandsSignature {
const CodeGenRegisterClass *RC = &Target.getRegisterClass(OpLeafRec); const CodeGenRegisterClass *RC = &Target.getRegisterClass(OpLeafRec);
if (!RC) if (!RC)
return false; return false;
// For now, all the operands must have the same register class.
if (DstRC != RC)
return false;
// For now, all the operands must have the same type. // For now, all the operands must have the same type.
if (Op->getTypeNum(0) != VT) if (Op->getTypeNum(0) != VT)
return false; return false;
@ -230,7 +234,7 @@ void FastISelEmitter::run(std::ostream &OS) {
// Check all the operands. // Check all the operands.
OperandsSignature Operands; OperandsSignature Operands;
if (!Operands.initialize(InstPatNode, Target, VT)) if (!Operands.initialize(InstPatNode, Target, VT, DstRC))
continue; continue;
// If it's not a known signature, ignore it. // If it's not a known signature, ignore it.