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Fix Regression/CodeGen/X86/inline-asm.ll, a case where inline asm causes
implement extension of a register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28731 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1780,15 +1780,19 @@ SDOperand RegsForValue::getCopyFromRegs(SelectionDAG &DAG,
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return DAG.getNode(ISD::BUILD_PAIR, ValueVT, Hi, Val);
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}
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// Otherwise, if the return value was promoted, truncate it to the
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// Otherwise, if the return value was promoted or extended, truncate it to the
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// appropriate type.
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if (RegVT == ValueVT)
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return Val;
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if (MVT::isInteger(RegVT))
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return DAG.getNode(ISD::TRUNCATE, ValueVT, Val);
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else
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if (MVT::isInteger(RegVT)) {
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if (ValueVT < RegVT)
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return DAG.getNode(ISD::TRUNCATE, ValueVT, Val);
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else
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return DAG.getNode(ISD::ANY_EXTEND, ValueVT, Val);
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} else {
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return DAG.getNode(ISD::FP_ROUND, ValueVT, Val);
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}
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}
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/// getCopyToRegs - Emit a series of CopyToReg nodes that copies the
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@ -1895,14 +1899,17 @@ GetRegistersForValue(const std::string &ConstrCode,
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if (PhysReg.first) {
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if (VT == MVT::Other)
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ValueVT = *PhysReg.second->vt_begin();
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RegVT = VT;
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// Get the actual register value type. This is important, because the user
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// may have asked for (e.g.) the AX register in i32 type. We need to
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// remember that AX is actually i16 to get the right extension.
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RegVT = *PhysReg.second->vt_begin();
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// This is a explicit reference to a physical register.
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Regs.push_back(PhysReg.first);
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// If this is an expanded reference, add the rest of the regs to Regs.
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if (NumRegs != 1) {
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RegVT = *PhysReg.second->vt_begin();
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TargetRegisterClass::iterator I = PhysReg.second->begin();
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TargetRegisterClass::iterator E = PhysReg.second->end();
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for (; *I != PhysReg.first; ++I)
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