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More bits of the ARM target assembler for llvm-mc to parse immediates.

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Also fixed a couple of coding style things that crept in.  And added more
to the temporary hacked up ARMAsmParser::MatchInstruction() method for testing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84040 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Kevin Enderby
2009-10-13 22:19:02 +00:00
parent 50a5914e12
commit cfe0724016
1 changed files with 28 additions and 4 deletions
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30
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
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@ -92,6 +92,7 @@ struct ARMOperand {
enum { enum {
Token, Token,
Register, Register,
Immediate,
Memory Memory
} Kind; } Kind;
@ -107,6 +108,10 @@ struct ARMOperand {
bool Writeback; bool Writeback;
} Reg; } Reg;
struct {
const MCExpr *Val;
} Imm;
// This is for all forms of ARM address expressions // This is for all forms of ARM address expressions
struct { struct {
unsigned BaseRegNum; unsigned BaseRegNum;
@ -134,6 +139,11 @@ struct ARMOperand {
return Reg.RegNum; return Reg.RegNum;
} }
const MCExpr *getImm() const {
assert(Kind == Immediate && "Invalid access!");
return Imm.Val;
}
bool isToken() const {return Kind == Token; } bool isToken() const {return Kind == Token; }
bool isReg() const { return Kind == Register; } bool isReg() const { return Kind == Register; }
@ -159,6 +169,13 @@ struct ARMOperand {
return Res; return Res;
} }
static ARMOperand CreateImm(const MCExpr *Val) {
ARMOperand Res;
Res.Kind = Immediate;
Res.Imm.Val = Val;
return Res;
}
static ARMOperand CreateMem(unsigned BaseRegNum, bool OffsetIsReg, static ARMOperand CreateMem(unsigned BaseRegNum, bool OffsetIsReg,
const MCExpr *Offset, unsigned OffsetRegNum, const MCExpr *Offset, unsigned OffsetRegNum,
bool OffsetRegShifted, enum ShiftType ShiftType, bool OffsetRegShifted, enum ShiftType ShiftType,
@ -498,7 +515,8 @@ bool ARMAsmParser::MatchInstruction(SmallVectorImpl<ARMOperand> &Operands,
Mnemonic == "str" || Mnemonic == "str" ||
Mnemonic == "ldmfd" || Mnemonic == "ldmfd" ||
Mnemonic == "ldr" || Mnemonic == "ldr" ||
Mnemonic == "mov") Mnemonic == "mov" ||
Mnemonic == "sub")
return false; return false;
return true; return true;
@ -517,9 +535,15 @@ bool ARMAsmParser::ParseOperand(ARMOperand &Op) {
return false; return false;
case AsmToken::LCurly: case AsmToken::LCurly:
if (!ParseRegisterList(Op)) if (!ParseRegisterList(Op))
return(false); return false;
case AsmToken::Hash: case AsmToken::Hash:
return Error(getLexer().getTok().getLoc(), "immediates not yet supported"); // $42 -> immediate.
getLexer().Lex();
const MCExpr *Val;
if (getParser().ParseExpression(Val))
return true;
Op = ARMOperand::CreateImm(Val);
return false;
default: default:
return Error(getLexer().getTok().getLoc(), "unexpected token in operand"); return Error(getLexer().getTok().getLoc(), "unexpected token in operand");
} }