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[AVX] Add INSERT_SUBVECTOR and support it on x86. This provides a
default implementation for x86, going through the stack in a similr fashion to how the codegen implements BUILD_VECTOR. Eventually this will get matched to VINSERTF128 if AVX is available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124307 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3082,6 +3082,30 @@ SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
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case ISD::VECTOR_SHUFFLE:
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llvm_unreachable("should use getVectorShuffle constructor!");
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break;
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case ISD::INSERT_SUBVECTOR: {
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SDValue Index = N3;
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if (VT.isSimple() && N1.getValueType().isSimple()
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&& N2.getValueType().isSimple()) {
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assert(VT.isVector() && N1.getValueType().isVector() &&
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N2.getValueType().isVector() &&
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"Insert subvector VTs must be a vectors");
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assert(VT == N1.getValueType() &&
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"Dest and insert subvector source types must match!");
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assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
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"Insert subvector must be from smaller vector to larger vector!");
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if (ConstantSDNode *CSD = dyn_cast<ConstantSDNode>(Index.getNode())) {
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uint64_t Idx = CSD->getZExtValue();
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assert((N2.getValueType().getVectorNumElements() + Idx
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<= VT.getVectorNumElements())
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&& "Insert subvector overflow!");
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}
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// Trivial insertion.
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if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
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return N2;
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}
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break;
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}
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case ISD::BITCAST:
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// Fold bit_convert nodes from a type to themselves.
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if (N1.getValueType() == VT)
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@ -5811,6 +5835,7 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const {
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case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
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case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
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case ISD::CONCAT_VECTORS: return "concat_vectors";
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case ISD::INSERT_SUBVECTOR: return "insert_subvector";
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case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
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case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
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case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
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