mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-17 21:29:20 +00:00
Added comments and correct logic for finding register sizes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1494 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ruchira Sasanka
parent
4f3eb22e1f
commit
d00982a81c
@ -180,7 +180,6 @@ class PhyRegAlloc;
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class UltraSparcRegInfo : public MachineRegInfo
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{
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private:
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// The actual register classes in the Sparc
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@ -336,20 +335,21 @@ class UltraSparcRegInfo : public MachineRegInfo
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bool isVarArgCall(const MachineInstr *CallMI) const;
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public:
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UltraSparcRegInfo(const TargetMachine& tgt ) : MachineRegInfo(tgt),
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UltraSparcInfo(& (const UltraSparc&) tgt),
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NumOfIntArgRegs(6),
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NumOfFloatArgRegs(32),
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InvalidRegNum(1000),
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SizeOfOperandOnStack(8)
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{
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UltraSparcRegInfo(const TargetMachine& tgt ) :
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MachineRegInfo(tgt),
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UltraSparcInfo(& (const UltraSparc&) tgt),
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NumOfIntArgRegs(6),
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NumOfFloatArgRegs(32),
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InvalidRegNum(1000),
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SizeOfOperandOnStack(8) {
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MachineRegClassArr.push_back( new SparcIntRegClass(IntRegClassID) );
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MachineRegClassArr.push_back( new SparcFloatRegClass(FloatRegClassID) );
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MachineRegClassArr.push_back( new SparcIntCCRegClass(IntCCRegClassID) );
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@ -421,7 +421,8 @@ class UltraSparcRegInfo : public MachineRegInfo
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AddedInstrns *const FirstAI) const;
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void colorCallArgs(const MachineInstr *const CallMI, LiveRangeInfo& LRI,
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AddedInstrns *const CallAI, PhyRegAlloc &PRA) const;
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AddedInstrns *const CallAI, PhyRegAlloc &PRA,
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const BasicBlock *BB) const;
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void colorRetValue(const MachineInstr *const RetI, LiveRangeInfo& LRI,
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AddedInstrns *const RetAI) const;
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@ -478,6 +479,14 @@ class UltraSparcRegInfo : public MachineRegInfo
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return (reg != InvalidRegNum && reg < 32);
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}
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inline int getSpilledRegSize(const int RegType) const {
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return 8;
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//
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// for Sparc, we allocate 8 bytes on stack for all register types
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}
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const Value * getCallInstRetVal(const MachineInstr *CallMI) const;
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MachineInstr * cpReg2RegMI(const unsigned SrcReg, const unsigned DestReg,
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@ -4,23 +4,20 @@
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#include "llvm/Target/Sparc.h"
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//-----------------------------------------------------------------------------
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// Int Register Class
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// Int Register Class - method for coloring a node in the interference graph.
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//
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// Algorithm:
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// Record the colors/suggested colors of all neighbors.
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//
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// If there is a suggested color, try to allocate it
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// If there is no call interf, try to allocate volatile, then non volatile
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// If there is call interf, try to allocate non-volatile. If that fails
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// try to allocate a volatile and insert save across calls
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// If both above fail, spill.
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//
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//-----------------------------------------------------------------------------
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void SparcIntRegClass::colorIGNode(IGNode * Node, bool IsColorUsedArr[]) const
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{
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/* Algorithm:
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Record the colors/suggested colors of all neighbors.
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If there is a suggested color, try to allocate it
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If there is no call interf, try to allocate volatile, then non volatile
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If there is call interf, try to allocate non-volatile. If that fails
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try to allocate a volatile and insert save across calls
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If both above fail, spill.
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*/
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LiveRange * LR = Node->getParentLR();
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unsigned NumNeighbors = Node->getNumOfNeighbors(); // total # of neighbors
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@ -37,7 +34,6 @@ void SparcIntRegClass::colorIGNode(IGNode * Node, bool IsColorUsedArr[]) const
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if( NeighLR-> isSuggestedColorUsable() )
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IsColorUsedArr[ NeighLR->getSuggestedColor() ] = true;
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}
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}
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if( DEBUG_RA ) {
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@ -49,8 +45,6 @@ void SparcIntRegClass::colorIGNode(IGNode * Node, bool IsColorUsedArr[]) const
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unsigned SugCol = LR->getSuggestedColor();
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// cout << "\n -Has sug color: " << SugCol;
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if( ! IsColorUsedArr[ SugCol ] ) {
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if( LR->isSuggestedColorUsable() ) {
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@ -102,6 +96,7 @@ void SparcIntRegClass::colorIGNode(IGNode * Node, bool IsColorUsedArr[]) const
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// if color is not found because of call interference
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// try even finding a volatile color and insert save across calls
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//
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else if( LR->isCallInterference() )
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{
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// start from 0 - try to find even a volatile this time
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@ -116,16 +111,16 @@ void SparcIntRegClass::colorIGNode(IGNode * Node, bool IsColorUsedArr[]) const
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LR->setColor(c);
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// get the live range corresponding to live var
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// since LR span across calls, must save across calls
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//
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LR->markForSaveAcrossCalls();
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if(DEBUG_RA) cout << "\n Colored after SECOND search with col " << c ;
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}
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}
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// If we couldn't find a color regardless of call interference - i.e., we
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// don't have either a volatile or non-volatile color left
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//
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if( !ColorFound )
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LR->markForSpill(); // no color found - must spill
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@ -141,61 +136,23 @@ void SparcIntRegClass::colorIGNode(IGNode * Node, bool IsColorUsedArr[]) const
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//-----------------------------------------------------------------------------
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// Float Register Class
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//-----------------------------------------------------------------------------
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// find the first available color in the range [Start,End] depending on the
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// type of the Node (i.e., float/double)
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int SparcFloatRegClass::findFloatColor(const LiveRange *const LR,
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unsigned Start,
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unsigned End,
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bool IsColorUsedArr[] ) const
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{
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bool ColorFound = false;
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unsigned c;
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if( LR->getTypeID() == Type::DoubleTyID ) {
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// find first unused color for a double
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for( c=Start; c < End ;c+= 2){
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if( ! IsColorUsedArr[ c ] && ! IsColorUsedArr[ c+1 ])
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{ ColorFound=true; break; }
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}
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} else {
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// find first unused color for a single
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for( c=Start; c < End; c++) {
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if( ! IsColorUsedArr[ c ] ) { ColorFound=true; break; }
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}
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}
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if( ColorFound ) return c;
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else return -1;
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}
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// Float Register Class - method for coloring a node in the interference graph.
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//
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// Algorithm:
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//
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// If the LR is a double try to allocate f32 - f63
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// If the above fails or LR is single precision
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// If the LR does not interfere with a call
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// start allocating from f0
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// Else start allocating from f6
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// If a color is still not found because LR interferes with a call
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// Search in f0 - f6. If found mark for spill across calls.
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// If a color is still not fond, mark for spilling
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//
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//----------------------------------------------------------------------------
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void SparcFloatRegClass::colorIGNode(IGNode * Node,bool IsColorUsedArr[]) const
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{
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/* Algorithm:
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If the LR is a double try to allocate f32 - f63
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If the above fails or LR is single precision
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If the LR does not interfere with a call
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start allocating from f0
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Else start allocating from f6
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If a color is still not found because LR interferes with a call
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Search in f0 - f6. If found mark for spill across calls.
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If a color is still not fond, mark for spilling
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*/
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LiveRange * LR = Node->getParentLR();
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unsigned NumNeighbors = Node->getNumOfNeighbors(); // total # of neighbors
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@ -245,17 +202,24 @@ void SparcFloatRegClass::colorIGNode(IGNode * Node,bool IsColorUsedArr[]) const
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bool isCallInterf = LR->isCallInterference();
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// if value is a double - search the double only reigon (f32 - f63)
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// i.e. we try to allocate f32 - f63 first for doubles since singles
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// cannot go there. By doing that, we provide more space for singles
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// in f0 - f31
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//
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if( LR->getTypeID() == Type::DoubleTyID )
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ColorFound = findFloatColor( LR, 32, 64, IsColorUsedArr );
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if( ColorFound >= 0 ) {
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if( ColorFound >= 0 ) { // if we could find a color
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LR->setColor(ColorFound);
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if( DEBUG_RA) UltraSparcRegInfo::printReg( LR );
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return;
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}
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else {
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else { // the above fails or LR is single precision
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// if we didn't find a color becuase the LR was single precision or
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// all f32-f63 range is filled, we try to allocate a register from
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// the f0 - f31 region
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unsigned SearchStart; // start pos of color in pref-order
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@ -270,16 +234,15 @@ void SparcFloatRegClass::colorIGNode(IGNode * Node,bool IsColorUsedArr[]) const
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}
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ColorFound = findFloatColor( LR, SearchStart, 32, IsColorUsedArr );
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}
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if( ColorFound >= 0 ) {
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if( ColorFound >= 0 ) { // if we could find a color
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LR->setColor(ColorFound);
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if( DEBUG_RA) UltraSparcRegInfo::printReg( LR );
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return;
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}
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else if( isCallInterf ) {
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// We are here because there is a call interference and no non-volatile
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@ -306,7 +269,41 @@ void SparcFloatRegClass::colorIGNode(IGNode * Node,bool IsColorUsedArr[]) const
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LR->markForSpill(); // no color found - must spill
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if( DEBUG_RA) UltraSparcRegInfo::printReg( LR );
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}
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//-----------------------------------------------------------------------------
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// Helper method for coloring a node of Float Reg class.
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// Finds the first available color in the range [Start,End] depending on the
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// type of the Node (i.e., float/double)
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//-----------------------------------------------------------------------------
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int SparcFloatRegClass::findFloatColor(const LiveRange *const LR,
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unsigned Start,
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unsigned End,
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bool IsColorUsedArr[] ) const {
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bool ColorFound = false;
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unsigned c;
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if( LR->getTypeID() == Type::DoubleTyID ) {
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// find first unused color for a double
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for( c=Start; c < End ;c+= 2){
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if( ! IsColorUsedArr[ c ] && ! IsColorUsedArr[ c+1 ])
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{ ColorFound=true; break; }
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}
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} else {
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// find first unused color for a single
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for( c=Start; c < End; c++) {
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if( ! IsColorUsedArr[ c ] ) { ColorFound=true; break; }
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}
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}
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if( ColorFound ) return c;
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else return -1;
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}
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@ -322,5 +319,3 @@ void SparcFloatRegClass::colorIGNode(IGNode * Node,bool IsColorUsedArr[]) const
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@ -5,23 +5,22 @@
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#include "llvm/iOther.h"
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#include "llvm/CodeGen/InstrScheduling.h"
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#include "llvm/CodeGen/InstrSelection.h"
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#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
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#include "llvm/CodeGen/PhyRegAlloc.h"
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#include "llvm/DerivedTypes.h"
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//---------------------------------------------------------------------------
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// Purpose:
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// This file contains implementation of Sparc specific helper methods
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// used for register allocation.
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//---------------------------------------------------------------------------
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//---------------------------------------------------------------------------
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// UltraSparcRegInfo
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// Finds the return value of a sparc specific call instruction
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//---------------------------------------------------------------------------
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//---------------------------------------------------------------------------
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// Finds the return value of a call instruction
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//---------------------------------------------------------------------------
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const Value *
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UltraSparcRegInfo::getCallInstRetVal(const MachineInstr *CallMI) const{
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UltraSparcRegInfo::getCallInstRetVal(const MachineInstr *CallMI) const {
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unsigned OpCode = CallMI->getOpCode();
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unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
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@ -30,6 +29,7 @@ UltraSparcRegInfo::getCallInstRetVal(const MachineInstr *CallMI) const{
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// The one before the last implicit operand is the return value of
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// a CALL instr
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//
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if( NumOfImpRefs > 1 )
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if( CallMI->implicitRefIsDefined(NumOfImpRefs-2) )
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return CallMI->getImplicitRef(NumOfImpRefs-2);
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@ -37,7 +37,8 @@ UltraSparcRegInfo::getCallInstRetVal(const MachineInstr *CallMI) const{
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}
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else if( OpCode == JMPLCALL) {
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// The last implicit operand is the return value of a JMPL in
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// The last implicit operand is the return value of a JMPL
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//
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if( NumOfImpRefs > 0 )
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if( CallMI->implicitRefIsDefined(NumOfImpRefs-1) )
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return CallMI->getImplicitRef(NumOfImpRefs-1);
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@ -46,13 +47,13 @@ UltraSparcRegInfo::getCallInstRetVal(const MachineInstr *CallMI) const{
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assert(0 && "OpCode must be CALL/JMPL for a call instr");
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return NULL;
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}
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//---------------------------------------------------------------------------
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// Finds the return address of a call instruction
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//---------------------------------------------------------------------------
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//---------------------------------------------------------------------------
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// Finds the return address of a call sparc specific call instruction
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//---------------------------------------------------------------------------
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const Value *
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UltraSparcRegInfo::getCallInstRetAddr(const MachineInstr *CallMI)const {
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@ -63,7 +64,9 @@ UltraSparcRegInfo::getCallInstRetAddr(const MachineInstr *CallMI)const {
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unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
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assert( NumOfImpRefs && "CALL instr must have at least on ImpRef");
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// The last implicit operand is the return address of a CALL instr
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//
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return CallMI->getImplicitRef(NumOfImpRefs-1);
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}
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@ -79,14 +82,13 @@ UltraSparcRegInfo::getCallInstRetAddr(const MachineInstr *CallMI)const {
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assert(0 && "There must be a return addr for a call instr");
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return NULL;
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}
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//---------------------------------------------------------------------------
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// Finds the # of actual arguments of the call instruction
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//---------------------------------------------------------------------------
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const unsigned
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UltraSparcRegInfo::getCallInstNumArgs(const MachineInstr *CallMI) const {
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@ -128,15 +130,33 @@ UltraSparcRegInfo::getCallInstNumArgs(const MachineInstr *CallMI) const {
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assert( (NumArgs != -1) && "Internal error in getCallInstNumArgs" );
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return (unsigned) NumArgs;
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}
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//---------------------------------------------------------------------------
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// Suggests a register for the ret address in the RET machine instruction
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//---------------------------------------------------------------------------
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//---------------------------------------------------------------------------
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// Finds whether a call is an indirect call
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//---------------------------------------------------------------------------
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bool UltraSparcRegInfo::isVarArgCall(const MachineInstr *CallMI) const {
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assert ( (UltraSparcInfo->getInstrInfo()).isCall(CallMI->getOpCode()) );
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const MachineOperand & calleeOp = CallMI->getOperand(0);
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Value *calleeVal = calleeOp.getVRegValue();
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PointerType *PT = cast<PointerType> (calleeVal->getType());
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MethodType *MT = cast<MethodType>(PT->getElementType());
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return MT->isVarArg();
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}
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//---------------------------------------------------------------------------
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// Suggests a register for the ret address in the RET machine instruction.
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// We always suggest %i7 by convention.
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//---------------------------------------------------------------------------
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void UltraSparcRegInfo::suggestReg4RetAddr(const MachineInstr * RetMI,
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LiveRangeInfo& LRI) const {
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@ -145,30 +165,27 @@ void UltraSparcRegInfo::suggestReg4RetAddr(const MachineInstr * RetMI,
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MachineOperand & MO = ( MachineOperand &) RetMI->getOperand(0);
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// return address is always mapped to i7
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//
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MO.setRegForValue( getUnifiedRegNum( IntRegClassID, SparcIntRegOrder::i7) );
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// TODO (Optimize):
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// Possible Optimization:
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// Instead of setting the color, we can suggest one. In that case,
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// we have to test later whether it received the suggested color.
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// In that case, a LR has to be created at the start of method.
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// It has to be done as follows (remove the setRegVal above):
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/*
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const Value *RetAddrVal = MO.getVRegValue();
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assert( RetAddrVal && "LR for ret address must be created at start");
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LiveRange * RetAddrLR = LRI.getLiveRangeForValue( RetAddrVal);
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RetAddrLR->setSuggestedColor(getUnifiedRegNum( IntRegClassID,
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SparcIntRegOrdr::i7) );
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*/
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// const Value *RetAddrVal = MO.getVRegValue();
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// assert( RetAddrVal && "LR for ret address must be created at start");
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// LiveRange * RetAddrLR = LRI.getLiveRangeForValue( RetAddrVal);
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// RetAddrLR->setSuggestedColor(getUnifiedRegNum( IntRegClassID,
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// SparcIntRegOrdr::i7) );
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}
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//---------------------------------------------------------------------------
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// Suggests a register for the ret address in the JMPL/CALL machine instr
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// Suggests a register for the ret address in the JMPL/CALL machine instr.
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// Sparc ABI dictates that %o7 be used for this purpose.
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//---------------------------------------------------------------------------
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void UltraSparcRegInfo::suggestReg4CallAddr(const MachineInstr * CallMI,
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LiveRangeInfo& LRI,
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@ -187,18 +204,6 @@ void UltraSparcRegInfo::suggestReg4CallAddr(const MachineInstr * CallMI,
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RetAddrLR->setColor(getUnifiedRegNum(IntRegClassID,SparcIntRegOrder::o7));
|
||||
LRI.addLRToMap( RetAddrVal, RetAddrLR);
|
||||
|
||||
|
||||
/*
|
||||
assert( (CallMI->getNumOperands() == 3) && "JMPL must have 3 operands");
|
||||
|
||||
// directly set color since the LR of ret address (if there were one)
|
||||
// will not extend after the call instr
|
||||
|
||||
MachineOperand & MO = ( MachineOperand &) CallMI->getOperand(2);
|
||||
MO.setRegForValue( getUnifiedRegNum( IntRegClassID,SparcIntRegOrder::o7) );
|
||||
|
||||
*/
|
||||
|
||||
}
|
||||
|
||||
|
||||
@ -206,10 +211,11 @@ void UltraSparcRegInfo::suggestReg4CallAddr(const MachineInstr * CallMI,
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
// This method will suggest colors to incoming args to a method.
|
||||
// According to the Sparc ABI, the first 6 incoming args are in
|
||||
// %i0 - %i5 (if they are integer) OR in %f0 - %f31 (if they are float).
|
||||
// If the arg is passed on stack due to the lack of regs, NOTHING will be
|
||||
// done - it will be colored (or spilled) as a normal value.
|
||||
// done - it will be colored (or spilled) as a normal live range.
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
void UltraSparcRegInfo::suggestRegs4MethodArgs(const Method *const Meth,
|
||||
LiveRangeInfo& LRI) const
|
||||
{
|
||||
@ -230,13 +236,12 @@ void UltraSparcRegInfo::suggestRegs4MethodArgs(const Method *const Meth,
|
||||
|
||||
|
||||
// if the arg is in int class - allocate a reg for an int arg
|
||||
//
|
||||
if( RegType == IntRegType ) {
|
||||
|
||||
if( argNo < NumOfIntArgRegs) {
|
||||
LR->setSuggestedColor( SparcIntRegOrder::i0 + argNo );
|
||||
|
||||
}
|
||||
|
||||
else {
|
||||
// Do NOTHING as this will be colored as a normal value.
|
||||
if (DEBUG_RA) cerr << " Int Regr not suggested for method arg\n";
|
||||
@ -250,15 +255,16 @@ void UltraSparcRegInfo::suggestRegs4MethodArgs(const Method *const Meth,
|
||||
else if( RegType == FPDoubleRegType && (argNo*2) < NumOfFloatArgRegs)
|
||||
LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2) );
|
||||
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
// This method is called after graph coloring to move incoming args to
|
||||
// the correct hardware registers if they did not receive the correct
|
||||
// (suggested) color through graph coloring.
|
||||
//---------------------------------------------------------------------------
|
||||
void UltraSparcRegInfo::colorMethodArgs(const Method *const Meth,
|
||||
LiveRangeInfo& LRI,
|
||||
AddedInstrns *const FirstAI) const {
|
||||
@ -282,11 +288,11 @@ void UltraSparcRegInfo::colorMethodArgs(const Method *const Meth,
|
||||
unsigned RegType = getRegType( LR );
|
||||
unsigned RegClassID = (LR->getRegClass())->getID();
|
||||
|
||||
|
||||
// find whether this argument is coming in a register (if not, on stack)
|
||||
|
||||
// Find whether this argument is coming in a register (if not, on stack)
|
||||
// Also find the correct register that the argument must go (UniArgReg)
|
||||
//
|
||||
bool isArgInReg = false;
|
||||
unsigned UniArgReg = InvalidRegNum; // reg that LR MUST be colored with
|
||||
unsigned UniArgReg = InvalidRegNum; // reg that LR MUST be colored with
|
||||
|
||||
if( (RegType== IntRegType && argNo < NumOfIntArgRegs)) {
|
||||
isArgInReg = true;
|
||||
@ -303,21 +309,23 @@ void UltraSparcRegInfo::colorMethodArgs(const Method *const Meth,
|
||||
}
|
||||
|
||||
|
||||
if( LR->hasColor() ) {
|
||||
if( LR->hasColor() ) { // if this arg received a register
|
||||
|
||||
unsigned UniLRReg = getUnifiedRegNum( RegClassID, LR->getColor() );
|
||||
|
||||
// if LR received the correct color, nothing to do
|
||||
//
|
||||
if( UniLRReg == UniArgReg )
|
||||
continue;
|
||||
|
||||
// We are here because the LR did not have a suggested
|
||||
// color or did not receive the suggested color but LR got a register.
|
||||
// Now we have to copy %ix reg (or stack pos of arg)
|
||||
// to the register it was colored with.
|
||||
// We are here because the LR did not receive the suggested
|
||||
// but LR received another register.
|
||||
// Now we have to copy the %i reg (or stack pos of arg)
|
||||
// to the register the LR was colored with.
|
||||
|
||||
// if the arg is coming in UniArgReg register MUST go into
|
||||
// if the arg is coming in UniArgReg register, it MUST go into
|
||||
// the UniLRReg register
|
||||
//
|
||||
if( isArgInReg )
|
||||
AdMI = cpReg2RegMI( UniArgReg, UniLRReg, RegType );
|
||||
|
||||
@ -325,12 +333,14 @@ void UltraSparcRegInfo::colorMethodArgs(const Method *const Meth,
|
||||
|
||||
// Now the arg is coming on stack. Since the LR recieved a register,
|
||||
// we just have to load the arg on stack into that register
|
||||
//
|
||||
const MachineFrameInfo& frameInfo = target.getFrameInfo();
|
||||
assert(frameInfo.argsOnStackHaveFixedSize());
|
||||
|
||||
bool growUp;
|
||||
bool growUp; // find the offset of arg in stack frame
|
||||
int firstArg =
|
||||
frameInfo.getFirstIncomingArgOffset(MachineCodeForMethod::get(Meth), growUp);
|
||||
frameInfo.getFirstIncomingArgOffset(MachineCodeForMethod::get(Meth),
|
||||
growUp);
|
||||
int offsetFromFP =
|
||||
growUp? firstArg + argNo * frameInfo.getSizeOfEachArgOnStack()
|
||||
: firstArg - argNo * frameInfo.getSizeOfEachArgOnStack();
|
||||
@ -347,11 +357,9 @@ void UltraSparcRegInfo::colorMethodArgs(const Method *const Meth,
|
||||
|
||||
// Now, the LR did not receive a color. But it has a stack offset for
|
||||
// spilling.
|
||||
|
||||
// So, if the arg is coming in UniArgReg register, we can just move
|
||||
// that on to the stack pos of LR
|
||||
|
||||
|
||||
if( isArgInReg ) {
|
||||
|
||||
MachineInstr *AdIBef =
|
||||
@ -502,7 +510,8 @@ void UltraSparcRegInfo::suggestRegs4CallArgs(const MachineInstr *const CallMI,
|
||||
void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
|
||||
LiveRangeInfo& LRI,
|
||||
AddedInstrns *const CallAI,
|
||||
PhyRegAlloc &PRA) const {
|
||||
PhyRegAlloc &PRA,
|
||||
const BasicBlock *BB) const {
|
||||
|
||||
assert ( (UltraSparcInfo->getInstrInfo()).isCall(CallMI->getOpCode()) );
|
||||
|
||||
@ -588,12 +597,18 @@ void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
|
||||
} // if there a return value
|
||||
|
||||
|
||||
//-------------------------------------------
|
||||
// Now color all args of the call instruction
|
||||
//-------------------------------------------
|
||||
|
||||
vector <MachineInstr *> AddedInstrnsBefore;
|
||||
|
||||
unsigned NumOfCallArgs = getCallInstNumArgs( CallMI );
|
||||
|
||||
bool VarArgCall = isVarArgCall( CallMI );
|
||||
|
||||
if(VarArgCall) cerr << "\nVar arg call found!!\n";
|
||||
|
||||
for(unsigned argNo=0, i=0; i < NumOfCallArgs; ++i, ++argNo ) {
|
||||
|
||||
const Value *CallArg = CallMI->getImplicitRef(i);
|
||||
@ -615,14 +630,32 @@ void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
|
||||
}
|
||||
else if(RegType == FPSingleRegType && argNo < NumOfFloatArgRegs) {
|
||||
isArgInReg = true;
|
||||
UniArgReg = getUnifiedRegNum(RegClassID,
|
||||
SparcFloatRegOrder::f0 + (argNo*2 + 1) );
|
||||
|
||||
if( !VarArgCall )
|
||||
UniArgReg = getUnifiedRegNum(RegClassID,
|
||||
SparcFloatRegOrder::f0 + (argNo*2 + 1) );
|
||||
else {
|
||||
// a variable argument call - must pass float arg in %o's
|
||||
if( argNo < NumOfIntArgRegs)
|
||||
UniArgReg=getUnifiedRegNum(IntRegClassID,SparcIntRegOrder::o0+argNo);
|
||||
else
|
||||
isArgInReg = false;
|
||||
}
|
||||
|
||||
}
|
||||
else if(RegType == FPDoubleRegType && argNo < NumOfFloatArgRegs) {
|
||||
isArgInReg = true;
|
||||
UniArgReg = getUnifiedRegNum(RegClassID, SparcFloatRegOrder::f0+argNo*2);
|
||||
}
|
||||
|
||||
if( !VarArgCall )
|
||||
UniArgReg =getUnifiedRegNum(RegClassID,SparcFloatRegOrder::f0+argNo*2);
|
||||
else {
|
||||
// a variable argument call - must pass float arg in %o's
|
||||
if( argNo < NumOfIntArgRegs)
|
||||
UniArgReg=getUnifiedRegNum(IntRegClassID,SparcIntRegOrder::o0+argNo);
|
||||
else
|
||||
isArgInReg = false;
|
||||
}
|
||||
}
|
||||
|
||||
// not possible to have a null LR since all args (even consts)
|
||||
// must be defined before
|
||||
@ -636,9 +669,6 @@ void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
|
||||
}
|
||||
|
||||
|
||||
// if the LR received the suggested color, NOTHING to do
|
||||
|
||||
|
||||
if( LR->hasColor() ) {
|
||||
|
||||
|
||||
@ -656,8 +686,30 @@ void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
|
||||
// to pass it as an argument
|
||||
|
||||
if( isArgInReg ) {
|
||||
AdMI = cpReg2RegMI(UniLRReg, UniArgReg, RegType );
|
||||
AddedInstrnsBefore.push_back( AdMI );
|
||||
|
||||
if( VarArgCall && RegClassID == FloatRegClassID ) {
|
||||
|
||||
|
||||
// for a variable argument call, the float reg must go in a %o reg.
|
||||
// We have to move a float reg to an int reg via memory.
|
||||
// The store instruction will be directly added to
|
||||
// CallAI->InstrnsBefore since it does not need reordering
|
||||
//
|
||||
int TmpOff = PRA.mcInfo.pushTempValue(target,
|
||||
getSpilledRegSize(RegType));
|
||||
|
||||
AdMI = cpReg2MemMI(UniLRReg, getFramePointer(), TmpOff, RegType );
|
||||
CallAI->InstrnsBefore.push_back( AdMI );
|
||||
|
||||
AdMI = cpMem2RegMI(getFramePointer(), TmpOff, UniArgReg, IntRegType);
|
||||
AddedInstrnsBefore.push_back( AdMI );
|
||||
}
|
||||
|
||||
else {
|
||||
AdMI = cpReg2RegMI(UniLRReg, UniArgReg, RegType );
|
||||
AddedInstrnsBefore.push_back( AdMI );
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
else {
|
||||
@ -688,9 +740,12 @@ void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
|
||||
// Since, the outgoing arg goes in a register we just have to insert
|
||||
// a load instruction to load the LR to outgoing register
|
||||
|
||||
|
||||
AdMI = cpMem2RegMI(getFramePointer(), LR->getSpillOffFromFP(),
|
||||
UniArgReg, RegType );
|
||||
if( VarArgCall && RegClassID == FloatRegClassID )
|
||||
AdMI = cpMem2RegMI(getFramePointer(), LR->getSpillOffFromFP(),
|
||||
UniArgReg, IntRegType );
|
||||
else
|
||||
AdMI = cpMem2RegMI(getFramePointer(), LR->getSpillOffFromFP(),
|
||||
UniArgReg, RegType );
|
||||
|
||||
cerr << "\nCaution: Loading a spilled val to a reg as a call arg";
|
||||
AddedInstrnsBefore.push_back( AdMI ); // Now add the instruction
|
||||
@ -709,9 +764,9 @@ void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
|
||||
|
||||
int TReg = PRA.getUniRegNotUsedByThisInst( LR->getRegClass(), CallMI );
|
||||
|
||||
/**** NOTE: THIS SHOULD USE THE RIGHT SIZE FOR THE REG BEING PUSHED ****/
|
||||
int TmpOff = PRA.mcInfo.pushTempValue(target, 8);
|
||||
// target.findOptimalStorageSize(LR->getType()));
|
||||
int TmpOff = PRA.mcInfo.pushTempValue(target,
|
||||
getSpilledRegSize(getRegType(LR)) );
|
||||
|
||||
|
||||
int argOffset = PRA.mcInfo.allocateOptionalArg(target, LR->getType());
|
||||
|
||||
@ -772,6 +827,11 @@ void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
|
||||
}
|
||||
|
||||
|
||||
// now insert caller saving code for this call instruction
|
||||
//
|
||||
insertCallerSavingCode(CallMI, BB, PRA);
|
||||
|
||||
|
||||
// Reset optional args area again to be safe
|
||||
PRA.mcInfo.resetOptionalArgs(target);
|
||||
|
||||
@ -1112,7 +1172,7 @@ void UltraSparcRegInfo::insertCallerSavingCode(const MachineInstr *MInst,
|
||||
|
||||
// Clear the temp area of the stack
|
||||
//PRA.mcInfo.popAllTempValues(target);
|
||||
// TODO*** Don't do this since we can have a situation lik
|
||||
// TODO*** Don't do this since we can have a situation like
|
||||
/*
|
||||
|
||||
stx %o1 %i6 1999 <--- inserted by this code
|
||||
@ -1185,9 +1245,10 @@ void UltraSparcRegInfo::insertCallerSavingCode(const MachineInstr *MInst,
|
||||
// and add them to InstrnsBefore and InstrnsAfter of the
|
||||
// call instruction
|
||||
|
||||
/**** NOTE: THIS SHOULD USE THE RIGHT SIZE FOR THE REG BEING PUSHED ****/
|
||||
int StackOff = PRA.mcInfo.pushTempValue(target, 8);
|
||||
// target.findOptimalStorageSize(LR->getType()));
|
||||
|
||||
int StackOff = PRA.mcInfo.pushTempValue(target,
|
||||
getSpilledRegSize(RegType));
|
||||
|
||||
|
||||
MachineInstr *AdIBefCC, *AdIAftCC, *AdICpCC;
|
||||
MachineInstr *AdIBef, *AdIAft;
|
||||
@ -1561,9 +1622,8 @@ void UltraSparcRegInfo::moveInst2OrdVec(vector<MachineInstr *> &OrdVec,
|
||||
const int RegType = getRegType(UReg);
|
||||
MachineInstr *AdIBef, *AdIAft;
|
||||
|
||||
// TODO: Change 8 below
|
||||
/**** NOTE: THIS SHOULD USE THE RIGHT SIZE FOR THE REG BEING PUSHED ****/
|
||||
const int StackOff = PRA.mcInfo.pushTempValue(target, 8);
|
||||
const int StackOff = PRA.mcInfo.pushTempValue(target,
|
||||
getSpilledRegSize(RegType));
|
||||
|
||||
// Save the UReg (%ox) on stack before it's destroyed
|
||||
AdIBef=cpReg2MemMI(UReg, getFramePointer(), StackOff, RegType);
|
||||
|
||||
@ -291,14 +291,17 @@ UltraSparc::compileMethod(Method *method)
|
||||
<< "\n\n";
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
if (ScheduleInstructionsWithSSA(method, *this))
|
||||
{
|
||||
cerr << "Instruction scheduling before allocation failed for method "
|
||||
<< method->getName() << "\n\n";
|
||||
return true;
|
||||
}
|
||||
*/
|
||||
|
||||
|
||||
AllocateRegisters(method, *this); // allocate registers
|
||||
|
||||
ApplyPeepholeOptimizations(method, *this); // machine-dependent peephole opts
|
||||
|
||||
Loading…
Reference in New Issue
Block a user