Remove NEON vmull, vmlal, and vmlsl intrinsics, replacing them with multiply,

add, and subtract operations with zero-extended or sign-extended vectors.
Update tests.  Add auto-upgrade support for the old intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112773 91177308-0d34-0410-b5e6-96231b3b80d8

test/Bitcode/neon-intrinsics.ll

@@ -52,7 +52,7 @@
 ; CHECK: zext <4 x i16>
 ; CHECK-NEXT: add <4 x i32>
 
-; vsubl/vsubw should be auto-upgraded to sub with sext/zext
+; vsubl/vsubw should be auto-upgraded to subtract with sext/zext
 
 ; CHECK: vsubls16
 ; CHECK-NOT: arm.neon.vsubls.v4i32
@@ -76,6 +76,56 @@
 ; CHECK: zext <4 x i16>
 ; CHECK-NEXT: sub <4 x i32>
 
+; vmull should be auto-upgraded to multiply with sext/zext
+; (but vmullp should remain an intrinsic)
+
+; CHECK: vmulls8
+; CHECK-NOT: arm.neon.vmulls.v8i16
+; CHECK: sext <8 x i8>
+; CHECK-NEXT: sext <8 x i8>
+; CHECK-NEXT: mul <8 x i16>
+
+; CHECK: vmullu16
+; CHECK-NOT: arm.neon.vmullu.v4i32
+; CHECK: zext <4 x i16>
+; CHECK-NEXT: zext <4 x i16>
+; CHECK-NEXT: mul <4 x i32>
+
+; CHECK: vmullp8
+; CHECK: arm.neon.vmullp.v8i16
+
+; vmlal should be auto-upgraded to multiply/add with sext/zext
+
+; CHECK: vmlals32
+; CHECK-NOT: arm.neon.vmlals.v2i64
+; CHECK: sext <2 x i32>
+; CHECK-NEXT: sext <2 x i32>
+; CHECK-NEXT: mul <2 x i64>
+; CHECK-NEXT: add <2 x i64>
+
+; CHECK: vmlalu8
+; CHECK-NOT: arm.neon.vmlalu.v8i16
+; CHECK: zext <8 x i8>
+; CHECK-NEXT: zext <8 x i8>
+; CHECK-NEXT: mul <8 x i16>
+; CHECK-NEXT: add <8 x i16>
+
+; vmlsl should be auto-upgraded to multiply/sub with sext/zext
+
+; CHECK: vmlsls16
+; CHECK-NOT: arm.neon.vmlsls.v4i32
+; CHECK: sext <4 x i16>
+; CHECK-NEXT: sext <4 x i16>
+; CHECK-NEXT: mul <4 x i32>
+; CHECK-NEXT: sub <4 x i32>
+
+; CHECK: vmlslu32
+; CHECK-NOT: arm.neon.vmlslu.v2i64
+; CHECK: zext <2 x i32>
+; CHECK-NEXT: zext <2 x i32>
+; CHECK-NEXT: mul <2 x i64>
+; CHECK-NEXT: sub <2 x i64>
+
 ; vmovn should be auto-upgraded to trunc
 
 ; CHECK: vmovni16