Add support for matching the READPORT, WRITEPORT, READIO, WRITEIO intrinsics

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21825 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2005-05-09 20:22:36 +00:00
parent 3c6910153c
commit d0f6c1f52d

View File

@@ -638,13 +638,13 @@ void SelectionDAGLowering::visitStore(StoreInst &I) {
Value *SrcV = I.getOperand(0); Value *SrcV = I.getOperand(0);
SDOperand Src = getValue(SrcV); SDOperand Src = getValue(SrcV);
SDOperand Ptr = getValue(I.getOperand(1)); SDOperand Ptr = getValue(I.getOperand(1));
// DAG.setRoot(DAG.getNode(ISD::STORE, MVT::Other, getRoot(), Src, Ptr));
DAG.setRoot(DAG.getNode(ISD::STORE, MVT::Other, getRoot(), Src, Ptr, DAG.setRoot(DAG.getNode(ISD::STORE, MVT::Other, getRoot(), Src, Ptr,
DAG.getSrcValue(I.getOperand(1)))); DAG.getSrcValue(I.getOperand(1))));
} }
void SelectionDAGLowering::visitCall(CallInst &I) { void SelectionDAGLowering::visitCall(CallInst &I) {
const char *RenameFn = 0; const char *RenameFn = 0;
SDOperand Tmp;
if (Function *F = I.getCalledFunction()) if (Function *F = I.getCalledFunction())
if (F->isExternal()) if (F->isExternal())
switch (F->getIntrinsicID()) { switch (F->getIntrinsicID()) {
@@ -653,7 +653,7 @@ void SelectionDAGLowering::visitCall(CallInst &I) {
if (I.getNumOperands() == 2 && // Basic sanity checks. if (I.getNumOperands() == 2 && // Basic sanity checks.
I.getOperand(1)->getType()->isFloatingPoint() && I.getOperand(1)->getType()->isFloatingPoint() &&
I.getType() == I.getOperand(1)->getType()) { I.getType() == I.getOperand(1)->getType()) {
SDOperand Tmp = getValue(I.getOperand(1)); Tmp = getValue(I.getOperand(1));
setValue(&I, DAG.getNode(ISD::FABS, Tmp.getValueType(), Tmp)); setValue(&I, DAG.getNode(ISD::FABS, Tmp.getValueType(), Tmp));
return; return;
} }
@@ -662,7 +662,7 @@ void SelectionDAGLowering::visitCall(CallInst &I) {
if (I.getNumOperands() == 2 && // Basic sanity checks. if (I.getNumOperands() == 2 && // Basic sanity checks.
I.getOperand(1)->getType()->isFloatingPoint() && I.getOperand(1)->getType()->isFloatingPoint() &&
I.getType() == I.getOperand(1)->getType()) { I.getType() == I.getOperand(1)->getType()) {
SDOperand Tmp = getValue(I.getOperand(1)); Tmp = getValue(I.getOperand(1));
setValue(&I, DAG.getNode(ISD::FSIN, Tmp.getValueType(), Tmp)); setValue(&I, DAG.getNode(ISD::FSIN, Tmp.getValueType(), Tmp));
return; return;
} }
@@ -671,7 +671,7 @@ void SelectionDAGLowering::visitCall(CallInst &I) {
if (I.getNumOperands() == 2 && // Basic sanity checks. if (I.getNumOperands() == 2 && // Basic sanity checks.
I.getOperand(1)->getType()->isFloatingPoint() && I.getOperand(1)->getType()->isFloatingPoint() &&
I.getType() == I.getOperand(1)->getType()) { I.getType() == I.getOperand(1)->getType()) {
SDOperand Tmp = getValue(I.getOperand(1)); Tmp = getValue(I.getOperand(1));
setValue(&I, DAG.getNode(ISD::FCOS, Tmp.getValueType(), Tmp)); setValue(&I, DAG.getNode(ISD::FCOS, Tmp.getValueType(), Tmp));
return; return;
} }
@@ -682,18 +682,29 @@ void SelectionDAGLowering::visitCall(CallInst &I) {
case Intrinsic::vacopy: visitVACopy(I); return; case Intrinsic::vacopy: visitVACopy(I); return;
case Intrinsic::returnaddress: visitFrameReturnAddress(I, false); return; case Intrinsic::returnaddress: visitFrameReturnAddress(I, false); return;
case Intrinsic::frameaddress: visitFrameReturnAddress(I, true); return; case Intrinsic::frameaddress: visitFrameReturnAddress(I, true); return;
default:
// FIXME: IMPLEMENT THESE.
// readport, writeport, readio, writeio
std::cerr << I;
assert(0 && "This intrinsic is not implemented yet!");
return;
case Intrinsic::setjmp: RenameFn = "setjmp"; break; case Intrinsic::setjmp: RenameFn = "setjmp"; break;
case Intrinsic::longjmp: RenameFn = "longjmp"; break; case Intrinsic::longjmp: RenameFn = "longjmp"; break;
case Intrinsic::memcpy: visitMemIntrinsic(I, ISD::MEMCPY); return; case Intrinsic::memcpy: visitMemIntrinsic(I, ISD::MEMCPY); return;
case Intrinsic::memset: visitMemIntrinsic(I, ISD::MEMSET); return; case Intrinsic::memset: visitMemIntrinsic(I, ISD::MEMSET); return;
case Intrinsic::memmove: visitMemIntrinsic(I, ISD::MEMMOVE); return; case Intrinsic::memmove: visitMemIntrinsic(I, ISD::MEMMOVE); return;
case Intrinsic::readport:
case Intrinsic::readio:
Tmp = DAG.getNode(F->getIntrinsicID() == Intrinsic::readport ?
ISD::READPORT : ISD::READIO,
TLI.getValueType(I.getType()), getRoot(),
getValue(I.getOperand(1)));
setValue(&I, Tmp);
DAG.setRoot(Tmp.getValue(1));
return;
case Intrinsic::writeport:
case Intrinsic::writeio:
DAG.setRoot(DAG.getNode(F->getIntrinsicID() == Intrinsic::writeport ?
ISD::WRITEPORT : ISD::WRITEIO, MVT::Other,
getRoot(), getValue(I.getOperand(1)),
getValue(I.getOperand(2))));
return;
case Intrinsic::dbg_stoppoint: case Intrinsic::dbg_stoppoint:
case Intrinsic::dbg_region_start: case Intrinsic::dbg_region_start:
case Intrinsic::dbg_region_end: case Intrinsic::dbg_region_end:
@@ -714,11 +725,10 @@ void SelectionDAGLowering::visitCall(CallInst &I) {
getValue(I.getOperand(1)))); getValue(I.getOperand(1))));
return; return;
case Intrinsic::pcmarker: { case Intrinsic::pcmarker:
SDOperand Num = getValue(I.getOperand(1)); Tmp = getValue(I.getOperand(1));
DAG.setRoot(DAG.getNode(ISD::PCMARKER, MVT::Other, getRoot(), Num)); DAG.setRoot(DAG.getNode(ISD::PCMARKER, MVT::Other, getRoot(), Tmp));
return; return;
}
case Intrinsic::cttz: case Intrinsic::cttz:
setValue(&I, DAG.getNode(ISD::CTTZ, setValue(&I, DAG.getNode(ISD::CTTZ,
getValue(I.getOperand(1)).getValueType(), getValue(I.getOperand(1)).getValueType(),
@@ -734,6 +744,10 @@ void SelectionDAGLowering::visitCall(CallInst &I) {
getValue(I.getOperand(1)).getValueType(), getValue(I.getOperand(1)).getValueType(),
getValue(I.getOperand(1)))); getValue(I.getOperand(1))));
return; return;
default:
std::cerr << I;
assert(0 && "This intrinsic is not implemented yet!");
return;
} }
SDOperand Callee; SDOperand Callee;