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Mark ARM pseudo-instructions as isPseudo.

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This allows us to remove the (bogus and unneeded) encoding information from
the pseudo-instruction class definitions. All of the pseudos that haven't
been converted yet and still need encoding information instance from the normal
instruction classes and explicitly set isCodeGenOnly, and so are distinct
from this change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134540 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-07-06 21:35:46 +00:00
parent 806fcc040e
commit d1689ae4b1
1 changed files with 3 additions and 5 deletions
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8
lib/Target/ARM/ARMInstrFormats.td
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@ -282,15 +282,13 @@ class InstThumb<AddrMode am, SizeFlagVal sz, IndexMode im,
: InstTemplate<am, sz, im, f, d, cstr, itin>;
class PseudoInst<dag oops, dag iops, InstrItinClass itin, list<dag> pattern>
// FIXME: This really should derive from InstTemplate instead, as pseudos
// don't need encoding information. TableGen doesn't like that
// currently. Need to figure out why and fix it.
: InstARM<AddrModeNone, SizeSpecial, IndexModeNone, Pseudo, GenericDomain,
"", itin> {
: InstTemplate<AddrModeNone, SizeSpecial, IndexModeNone, Pseudo,
GenericDomain, "", itin> {
let OutOperandList = oops;
let InOperandList = iops;
let Pattern = pattern;
let isCodeGenOnly = 1;
let isPseudo = 1;
}
// PseudoInst that's ARM-mode only.