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[x86] Include the destination register in the check-lines for AVX

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instructions.

No actual change here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228127 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chandler Carruth 2015-02-04 09:18:27 +00:00
parent 82b686e611
commit d16b9cd3d4
1 changed files with 8 additions and 8 deletions
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16
test/CodeGen/X86/vector-shuffle-128-v8.ll
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@ -1929,7 +1929,7 @@ define <8 x i16> @shuffle_v8i16_z0z2z4z6(<8 x i16> %a) {
;
; AVX-LABEL: shuffle_v8i16_z0z2z4z6:
; AVX: # BB#0:
; AVX-NEXT: vpslld $16, %xmm0
; AVX-NEXT: vpslld $16, %xmm0, %xmm0
; AVX-NEXT: retq
%shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32><i32 8, i32 0, i32 8, i32 2, i32 8, i32 4, i32 8, i32 6>
ret <8 x i16> %shuffle
@ -1943,7 +1943,7 @@ define <8 x i16> @shuffle_v8i16_zzz0zzz4(<8 x i16> %a) {
;
; AVX-LABEL: shuffle_v8i16_zzz0zzz4:
; AVX: # BB#0:
; AVX-NEXT: vpsllq $48, %xmm0
; AVX-NEXT: vpsllq $48, %xmm0, %xmm0
; AVX-NEXT: retq
%shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32><i32 8, i32 8, i32 8, i32 0, i32 8, i32 8, i32 8, i32 4>
ret <8 x i16> %shuffle
@ -1957,7 +1957,7 @@ define <8 x i16> @shuffle_v8i16_zz01zX4X(<8 x i16> %a) {
;
; AVX-LABEL: shuffle_v8i16_zz01zX4X:
; AVX: # BB#0:
; AVX-NEXT: vpsllq $32, %xmm0
; AVX-NEXT: vpsllq $32, %xmm0, %xmm0
; AVX-NEXT: retq
%shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32><i32 8, i32 8, i32 0, i32 1, i32 8, i32 undef, i32 4, i32 undef>
ret <8 x i16> %shuffle
@ -1971,7 +1971,7 @@ define <8 x i16> @shuffle_v8i16_z0X2z456(<8 x i16> %a) {
;
; AVX-LABEL: shuffle_v8i16_z0X2z456:
; AVX: # BB#0:
; AVX-NEXT: vpsllq $16, %xmm0
; AVX-NEXT: vpsllq $16, %xmm0, %xmm0
; AVX-NEXT: retq
%shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32><i32 8, i32 0, i32 undef, i32 2, i32 8, i32 4, i32 5, i32 6>
ret <8 x i16> %shuffle
@ -1985,7 +1985,7 @@ define <8 x i16> @shuffle_v8i16_1z3zXz7z(<8 x i16> %a) {
;
; AVX-LABEL: shuffle_v8i16_1z3zXz7z:
; AVX: # BB#0:
; AVX-NEXT: vpsrld $16, %xmm0
; AVX-NEXT: vpsrld $16, %xmm0, %xmm0
; AVX-NEXT: retq
%shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32><i32 1, i32 8, i32 3, i32 8, i32 undef, i32 8, i32 7, i32 8>
ret <8 x i16> %shuffle
@ -1999,7 +1999,7 @@ define <8 x i16> @shuffle_v8i16_1X3z567z(<8 x i16> %a) {
;
; AVX-LABEL: shuffle_v8i16_1X3z567z:
; AVX: # BB#0:
; AVX-NEXT: vpsrlq $16, %xmm0
; AVX-NEXT: vpsrlq $16, %xmm0, %xmm0
; AVX-NEXT: retq
%shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32><i32 1, i32 undef, i32 3, i32 8, i32 5, i32 6, i32 7, i32 8>
ret <8 x i16> %shuffle
@ -2013,7 +2013,7 @@ define <8 x i16> @shuffle_v8i16_23zz67zz(<8 x i16> %a) {
;
; AVX-LABEL: shuffle_v8i16_23zz67zz:
; AVX: # BB#0:
; AVX-NEXT: vpsrlq $32, %xmm0
; AVX-NEXT: vpsrlq $32, %xmm0, %xmm0
; AVX-NEXT: retq
%shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32><i32 2, i32 3, i32 8, i32 8, i32 6, i32 7, i32 8, i32 8>
ret <8 x i16> %shuffle
@ -2027,7 +2027,7 @@ define <8 x i16> @shuffle_v8i16_3zXXXzzz(<8 x i16> %a) {
;
; AVX-LABEL: shuffle_v8i16_3zXXXzzz:
; AVX: # BB#0:
; AVX-NEXT: vpsrlq $48, %xmm0
; AVX-NEXT: vpsrlq $48, %xmm0, %xmm0
; AVX-NEXT: retq
%shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32><i32 3, i32 8, i32 undef, i32 undef, i32 undef, i32 8, i32 8, i32 8>
ret <8 x i16> %shuffle