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Added support to LegalizeType for expanding the operands of scalar to vector
and insert vector element. Modified extract vector element to extend the result to match the expected promoted type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61029 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -359,8 +359,10 @@ SDValue DAGTypeLegalizer::PromoteIntRes_EXTRACT_VECTOR_ELT(SDNode *N) {
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if (TLI.isBigEndian())
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std::swap(Lo, Hi);
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// Signed extend to the promoted type.
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SDValue Odd = DAG.getNode(ISD::TRUNCATE, MVT::i1, OldIdx);
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return DAG.getNode(ISD::SELECT, NewVT, Odd, Hi, Lo);
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SDValue Res = DAG.getNode(ISD::SELECT, NewVT, Odd, Hi, Lo);
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return DAG.getNode(ISD::ANY_EXTEND, TLI.getTypeToTransformTo(OldVT), Res);
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}
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SDValue DAGTypeLegalizer::PromoteIntRes_FP_TO_XINT(SDNode *N) {
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@ -1938,9 +1940,11 @@ bool DAGTypeLegalizer::ExpandIntegerOperand(SDNode *N, unsigned OpNo) {
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assert(0 && "Do not know how to expand this operator's operand!");
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abort();
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case ISD::BUILD_VECTOR: Res = ExpandOp_BUILD_VECTOR(N); break;
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case ISD::BIT_CONVERT: Res = ExpandOp_BIT_CONVERT(N); break;
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case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break;
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case ISD::BUILD_VECTOR: Res = ExpandOp_BUILD_VECTOR(N); break;
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case ISD::BIT_CONVERT: Res = ExpandOp_BIT_CONVERT(N); break;
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case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break;
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case ISD::INSERT_VECTOR_ELT: Res = ExpandOp_INSERT_VECTOR_ELT(N); break;
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case ISD::SCALAR_TO_VECTOR: Res = ExpandOp_SCALAR_TO_VECTOR(N); break;
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case ISD::BR_CC: Res = ExpandIntOp_BR_CC(N); break;
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case ISD::SELECT_CC: Res = ExpandIntOp_SELECT_CC(N); break;
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@ -613,11 +613,12 @@ private:
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void ExpandRes_VAARG (SDNode *N, SDValue &Lo, SDValue &Hi);
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// Generic Operand Expansion.
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SDValue ExpandOp_BIT_CONVERT (SDNode *N);
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SDValue ExpandOp_BUILD_VECTOR (SDNode *N);
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SDValue ExpandOp_EXTRACT_ELEMENT(SDNode *N);
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SDValue ExpandOp_NormalStore (SDNode *N, unsigned OpNo);
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SDValue ExpandOp_BIT_CONVERT (SDNode *N);
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SDValue ExpandOp_BUILD_VECTOR (SDNode *N);
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SDValue ExpandOp_EXTRACT_ELEMENT (SDNode *N);
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SDValue ExpandOp_INSERT_VECTOR_ELT(SDNode *N);
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SDValue ExpandOp_SCALAR_TO_VECTOR (SDNode *N);
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SDValue ExpandOp_NormalStore (SDNode *N, unsigned OpNo);
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};
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} // end namespace llvm.
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@ -280,6 +280,49 @@ SDValue DAGTypeLegalizer::ExpandOp_EXTRACT_ELEMENT(SDNode *N) {
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return cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() ? Hi : Lo;
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}
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SDValue DAGTypeLegalizer::ExpandOp_INSERT_VECTOR_ELT(SDNode *N) {
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// The vector type is legal but the element type needs expansion.
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MVT VecVT = N->getValueType(0);
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unsigned NumElts = VecVT.getVectorNumElements();
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SDValue Val = N->getOperand(1);
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MVT OldEVT = Val.getValueType();
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MVT NewEVT = TLI.getTypeToTransformTo(OldEVT);
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assert(OldEVT == VecVT.getVectorElementType() &&
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"Inserted element type doesn't match vector element type!");
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// Bitconvert to a vector of twice the length with elements of the expanded
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// type, insert the expanded vector elements, and then convert back.
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MVT NewVecVT = MVT::getVectorVT(NewEVT, NumElts*2);
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SDValue NewVec = DAG.getNode(ISD::BIT_CONVERT, NewVecVT, N->getOperand(0));
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SDValue Lo, Hi;
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GetExpandedOp(Val, Lo, Hi);
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if (TLI.isBigEndian())
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std::swap(Lo, Hi);
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SDValue Idx = N->getOperand(2);
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Idx = DAG.getNode(ISD::ADD, Idx.getValueType(), Idx, Idx);
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NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, NewVecVT, NewVec, Lo, Idx);
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Idx = DAG.getNode(ISD::ADD,Idx.getValueType(), Idx, DAG.getIntPtrConstant(1));
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NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, NewVecVT, NewVec, Hi, Idx);
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// Convert the new vector to the old vector type.
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return DAG.getNode(ISD::BIT_CONVERT, VecVT, NewVec);
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}
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SDValue DAGTypeLegalizer::ExpandOp_SCALAR_TO_VECTOR(SDNode *N) {
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MVT VT = N->getValueType(0);
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unsigned NumElts = VT.getVectorNumElements();
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SmallVector<SDValue, 16> Ops(NumElts);
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Ops[0] = N->getOperand(0);
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SDValue UndefVal = DAG.getNode(ISD::UNDEF, Ops[0].getValueType());
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for (unsigned i = 1; i < NumElts; ++i)
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Ops[i] = UndefVal;
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return DAG.getNode(ISD::BUILD_VECTOR, VT, &Ops[0], NumElts);
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}
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SDValue DAGTypeLegalizer::ExpandOp_NormalStore(SDNode *N, unsigned OpNo) {
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assert(ISD::isNormalStore(N) && "This routine only for normal stores!");
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assert(OpNo == 1 && "Can only expand the stored value so far");
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10
test/CodeGen/X86/insertelement-legalize.ll
Normal file
10
test/CodeGen/X86/insertelement-legalize.ll
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@ -0,0 +1,10 @@
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; RUN: llvm-as < %s | llc -march=x86 -disable-mmx
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; Test to check that we properly legalize an insert vector element
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define void @test(<2 x i64> %val, <2 x i64>* %dst, i64 %x) nounwind {
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entry:
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%tmp4 = insertelement <2 x i64> %val, i64 %x, i32 0 ; <<2 x i64>> [#uses=1]
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%add = add <2 x i64> %tmp4, %val ; <<2 x i64>> [#uses=1]
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store <2 x i64> %add, <2 x i64>* %dst
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ret void
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}
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