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Add some missing predicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121445 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -712,7 +712,8 @@ def VCVTSD2SSrm : I<0x5A, MRMSrcMem, (outs FR32:$dst),
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"vcvtsd2ss\t{$src2, $src1, $dst|$dst, $src1, $src2}",
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[]>, XD, Requires<[HasAVX, OptForSize]>, VEX_4V;
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}
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def : Pat<(f32 (fround FR64:$src)), (VCVTSD2SSrr FR64:$src, FR64:$src)>;
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def : Pat<(f32 (fround FR64:$src)), (VCVTSD2SSrr FR64:$src, FR64:$src)>,
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Requires<[HasAVX]>;
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def CVTSD2SSrr : SDI<0x5A, MRMSrcReg, (outs FR32:$dst), (ins FR64:$src),
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"cvtsd2ss\t{$src, $dst|$dst, $src}",
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@ -741,7 +742,8 @@ def VCVTSS2SDrm : I<0x5A, MRMSrcMem, (outs FR64:$dst),
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"vcvtss2sd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
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[]>, XS, VEX_4V, Requires<[HasAVX, OptForSize]>;
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}
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def : Pat<(f64 (fextend FR32:$src)), (VCVTSS2SDrr FR32:$src, FR32:$src)>;
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def : Pat<(f64 (fextend FR32:$src)), (VCVTSS2SDrr FR32:$src, FR32:$src)>,
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Requires<[HasAVX]>;
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def CVTSS2SDrr : I<0x5A, MRMSrcReg, (outs FR64:$dst), (ins FR32:$src),
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"cvtss2sd\t{$src, $dst|$dst, $src}",
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