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[SystemZ] Improve handling of SETCC
We previously used the default expansion to SELECT_CC, which in turn would expand to "LHI; BRC; LHI". In most cases it's better to use an IPM-based sequence instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192784 91177308-0d34-0410-b5e6-96231b3b80d8
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73
test/CodeGen/SystemZ/setcc-01.ll
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73
test/CodeGen/SystemZ/setcc-01.ll
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@@ -0,0 +1,73 @@
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; Test SETCC for every integer condition.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Test CC in { 0 }, with 3 don't care.
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define i32 @f1(i32 %a, i32 %b) {
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; CHECK-LABEL: f1:
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; CHECK: ipm %r2
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; CHECK-NEXT: afi %r2, -268435456
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; CHECK-NEXT: srl %r2, 31
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; CHECK: br %r14
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%cond = icmp eq i32 %a, %b
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%res = zext i1 %cond to i32
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ret i32 %res
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}
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; Test CC in { 1 }, with 3 don't care.
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define i32 @f2(i32 %a, i32 %b) {
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; CHECK-LABEL: f2:
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; CHECK: ipm [[REG:%r[0-5]]]
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; CHECK-NEXT: risbg %r2, [[REG]], 63, 191, 36
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; CHECK: br %r14
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%cond = icmp slt i32 %a, %b
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%res = zext i1 %cond to i32
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ret i32 %res
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}
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; Test CC in { 0, 1 }, with 3 don't care.
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define i32 @f3(i32 %a, i32 %b) {
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; CHECK-LABEL: f3:
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; CHECK: ipm %r2
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; CHECK-NEXT: afi %r2, -536870912
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; CHECK-NEXT: srl %r2, 31
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; CHECK: br %r14
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%cond = icmp sle i32 %a, %b
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%res = zext i1 %cond to i32
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ret i32 %res
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}
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; Test CC in { 2 }, with 3 don't care.
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define i32 @f4(i32 %a, i32 %b) {
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; CHECK-LABEL: f4:
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; CHECK: ipm [[REG:%r[0-5]]]
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; CHECK-NEXT: risbg %r2, [[REG]], 63, 191, 35
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; CHECK: br %r14
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%cond = icmp sgt i32 %a, %b
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%res = zext i1 %cond to i32
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ret i32 %res
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}
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; Test CC in { 0, 2 }, with 3 don't care.
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define i32 @f5(i32 %a, i32 %b) {
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; CHECK-LABEL: f5:
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; CHECK: ipm [[REG:%r[0-5]]]
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; CHECK-NEXT: xilf [[REG]], 4294967295
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; CHECK-NEXT: risbg %r2, [[REG]], 63, 191, 36
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; CHECK: br %r14
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%cond = icmp sge i32 %a, %b
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%res = zext i1 %cond to i32
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ret i32 %res
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}
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; Test CC in { 1, 2 }, with 3 don't care.
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define i32 @f6(i32 %a, i32 %b) {
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; CHECK-LABEL: f6:
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; CHECK: ipm %r2
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; CHECK-NEXT: afi %r2, 1879048192
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; CHECK-NEXT: srl %r2, 31
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; CHECK: br %r14
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%cond = icmp ne i32 %a, %b
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%res = zext i1 %cond to i32
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ret i32 %res
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}
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