From d1c3f6664ec5190f3676453e345229aded1b548b Mon Sep 17 00:00:00 2001 From: David Woodhouse Date: Mon, 20 Jan 2014 12:02:40 +0000 Subject: [PATCH] [x86] Fix disassembly of callw instruction Not quite sure why this was marked isAsmParserOnly, but it means that the disassembler can't see it either. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199651 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrControl.td | 10 ++++------ test/MC/Disassembler/X86/x86-16.txt | 4 ++-- 2 files changed, 6 insertions(+), 8 deletions(-) diff --git a/lib/Target/X86/X86InstrControl.td b/lib/Target/X86/X86InstrControl.td index 98a897af323..7295cf1b8d5 100644 --- a/lib/Target/X86/X86InstrControl.td +++ b/lib/Target/X86/X86InstrControl.td @@ -186,6 +186,10 @@ let isCall = 1 in (outs), (ins i32imm_pcrel:$dst), "call{l}\t$dst", [], IIC_CALL_RI>, OpSize16, Requires<[Not64BitMode]>, Sched<[WriteJump]>; + def CALLpcrel16 : Ii16PCRel<0xE8, RawFrm, + (outs), (ins i16imm_pcrel:$dst), + "call{w}\t$dst", [], IIC_CALL_RI>, OpSize, + Sched<[WriteJump]>; def CALL16r : I<0xFF, MRM2r, (outs), (ins GR16:$dst), "call{w}\t{*}$dst", [(X86call GR16:$dst)], IIC_CALL_RI>, OpSize, Requires<[Not64BitMode]>, Sched<[WriteJump]>; @@ -218,12 +222,6 @@ let isCall = 1 in def FARCALL32m : I<0xFF, MRM3m, (outs), (ins opaque48mem:$dst), "lcall{l}\t{*}$dst", [], IIC_CALL_FAR_MEM>, OpSize16, Sched<[WriteJumpLd]>; - - // callw for 16 bit code for the assembler. - let isAsmParserOnly = 1 in - def CALLpcrel16 : Ii16PCRel<0xE8, RawFrm, - (outs), (ins i16imm_pcrel:$dst), - "callw\t$dst", []>, OpSize; } diff --git a/test/MC/Disassembler/X86/x86-16.txt b/test/MC/Disassembler/X86/x86-16.txt index eef8723c9a2..50d79c161fc 100644 --- a/test/MC/Disassembler/X86/x86-16.txt +++ b/test/MC/Disassembler/X86/x86-16.txt @@ -492,8 +492,8 @@ # CHECK: calll 0x66 0xe8 0x00 0x00 0x00 0x00 -# CHECKX: callw -#0xe8 0x00 0x00 +# CHECK: callw +0xe8 0x00 0x00 # CHECK: incb %al 0xfe 0xc0