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BT memory operands load from their address operand.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61424 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2008-12-25 01:27:10 +00:00
parent 1c39d4cfaa
commit d1e3229e4b
2 changed files with 3 additions and 3 deletions
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2
lib/Target/X86/X86Instr64bit.td
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@ -927,7 +927,7 @@ def BT64rr : RI<0xA3, MRMSrcReg, (outs), (ins GR64:$src1, GR64:$src2),
(implicit EFLAGS)]>;
def BT64mr : RI<0xA3, MRMSrcMem, (outs), (ins i64mem:$src1, GR64:$src2),
"bt{q}\t{$src2, $src1|$src1, $src2}",
[(X86bt addr:$src1, GR64:$src2),
[(X86bt (loadi64 addr:$src1), GR64:$src2),
(implicit EFLAGS)]>;
} // Defs = [EFLAGS]

4
lib/Target/X86/X86InstrInfo.td
View File

@ -2665,11 +2665,11 @@ def BT32rr : I<0xA3, MRMSrcReg, (outs), (ins GR32:$src1, GR32:$src2),
(implicit EFLAGS)]>;
def BT16mr : I<0xA3, MRMSrcMem, (outs), (ins i16mem:$src1, GR16:$src2),
"bt{w}\t{$src2, $src1|$src1, $src2}",
[(X86bt addr:$src1, GR16:$src2),
[(X86bt (loadi16 addr:$src1), GR16:$src2),
(implicit EFLAGS)]>, OpSize;
def BT32mr : I<0xA3, MRMSrcMem, (outs), (ins i32mem:$src1, GR32:$src2),
"bt{l}\t{$src2, $src1|$src1, $src2}",
[(X86bt addr:$src1, GR32:$src2),
[(X86bt (loadi32 addr:$src1), GR32:$src2),
(implicit EFLAGS)]>;
} // Defs = [EFLAGS]