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Zap useless code; this hasn't done anything useful since fast-isel switched to being bottom-up (a very long time ago).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131329 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -108,8 +108,6 @@ private:
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bool X86SelectFPExt(const Instruction *I);
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bool X86SelectFPTrunc(const Instruction *I);
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bool X86SelectExtractValue(const Instruction *I);
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bool X86VisitIntrinsicCall(const IntrinsicInst &I);
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bool X86SelectCall(const Instruction *I);
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@ -1303,31 +1301,6 @@ bool X86FastISel::X86SelectTrunc(const Instruction *I) {
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return true;
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}
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bool X86FastISel::X86SelectExtractValue(const Instruction *I) {
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const ExtractValueInst *EI = cast<ExtractValueInst>(I);
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const Value *Agg = EI->getAggregateOperand();
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if (const IntrinsicInst *CI = dyn_cast<IntrinsicInst>(Agg)) {
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switch (CI->getIntrinsicID()) {
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default: break;
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case Intrinsic::sadd_with_overflow:
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case Intrinsic::uadd_with_overflow: {
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// Cheat a little. We know that the registers for "add" and "seto" are
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// allocated sequentially. However, we only keep track of the register
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// for "add" in the value map. Use extractvalue's index to get the
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// correct register for "seto".
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unsigned OpReg = getRegForValue(Agg);
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if (OpReg == 0)
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return false;
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UpdateValueMap(I, OpReg + *EI->idx_begin());
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return true;
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}
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}
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}
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return false;
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}
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bool X86FastISel::TryEmitSmallMemcpy(X86AddressMode DestAM,
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X86AddressMode SrcAM, uint64_t Len) {
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// Make sure we don't bloat code by inlining very large memcpy's.
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@ -1911,8 +1884,6 @@ X86FastISel::TargetSelectInstruction(const Instruction *I) {
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return X86SelectFPExt(I);
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case Instruction::FPTrunc:
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return X86SelectFPTrunc(I);
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case Instruction::ExtractValue:
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return X86SelectExtractValue(I);
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case Instruction::IntToPtr: // Deliberate fall-through.
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case Instruction::PtrToInt: {
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EVT SrcVT = TLI.getValueType(I->getOperand(0)->getType());
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