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Fix "Control reaches the end of non-void function" warnings,
patch by David Chisnall. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48963 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -166,6 +166,7 @@ public:
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assert(0 && "Unsupported!");
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}
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assert(0 && "Illegal empty element");
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return 0; // Not reached
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}
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/// find_next - Returns the index of the next set bit starting from the
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@ -210,6 +210,7 @@ public:
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return getTypeAction(NVT) == Promote ? getTypeToTransformTo(NVT) : NVT;
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}
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assert(0 && "Unsupported extended type!");
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return MVT::ValueType(); // Not reached
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}
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/// getTypeToExpandTo - For types supported by the target, this is an
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@ -440,6 +441,7 @@ public:
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return getRegisterType(getTypeToTransformTo(VT));
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}
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assert(0 && "Unsupported extended type!");
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return MVT::ValueType(); // Not reached
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}
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/// getNumRegisters - Return the number of registers that this ValueType will
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@ -464,6 +466,7 @@ public:
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return (BitWidth + RegWidth - 1) / RegWidth;
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}
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assert(0 && "Unsupported extended type!");
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return 0; // Not reached
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}
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/// ShouldShrinkFPConstant - If true, then instruction selection should
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@ -808,6 +808,7 @@ static SDOperand getCopyFromParts(SelectionDAG &DAG,
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return DAG.getNode(ISD::BIT_CONVERT, ValueVT, Val);
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assert(0 && "Unknown mismatch!");
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return SDOperand();
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}
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/// getCopyToParts - Create a series of nodes that contain the specified value
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@ -78,6 +78,7 @@ double LLVMGenericValueToFloat(LLVMTypeRef TyRef, LLVMGenericValueRef GenVal) {
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assert(0 && "LLVMGenericValueToFloat supports only float and double.");
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break;
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}
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return 0; // Not reached
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}
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void LLVMDisposeGenericValue(LLVMGenericValueRef GenVal) {
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@ -919,6 +919,7 @@ unsigned ARM::GetInstSize(MachineInstr *MI) {
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}
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}
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}
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return 0; // Not reached
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}
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/// GetFunctionSize - Returns the size of the specified MachineFunction.
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@ -307,6 +307,7 @@ static unsigned AlphaRevCondCode(unsigned Opcode) {
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default:
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assert(0 && "Unknown opcode");
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}
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return 0; // Not reached
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}
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// Branch analysis.
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@ -259,6 +259,7 @@ std::string MSILWriter::getConvModopt(unsigned CallingConvID) {
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cerr << "CallingConvID = " << CallingConvID << '\n';
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assert(0 && "Unsupported calling convention");
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}
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return ""; // Not reached
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}
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@ -304,6 +305,7 @@ std::string MSILWriter::getPrimitiveTypeName(const Type* Ty, bool isSigned) {
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cerr << "Type = " << *Ty << '\n';
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assert(0 && "Invalid primitive type");
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}
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return ""; // Not reached
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}
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@ -331,6 +333,7 @@ std::string MSILWriter::getTypeName(const Type* Ty, bool isSigned,
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cerr << "Type = " << *Ty << '\n';
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assert(0 && "Invalid type in getTypeName()");
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}
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return ""; // Not reached
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}
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@ -374,6 +377,7 @@ std::string MSILWriter::getTypePostfix(const Type* Ty, bool Expand,
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cerr << "TypeID = " << Ty->getTypeID() << '\n';
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assert(0 && "Invalid type in TypeToPostfix()");
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}
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return ""; // Not reached
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}
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@ -1446,6 +1450,7 @@ unsigned int MSILWriter::getBitWidth(const Type* Ty) {
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cerr << "Bits = " << N << '\n';
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assert(0 && "Unsupported integer width");
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}
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return 0; // Not reached
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}
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@ -181,6 +181,7 @@ SDOperand MipsTargetLowering::
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LowerGlobalTLSAddress(SDOperand Op, SelectionDAG &DAG)
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{
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assert(0 && "TLS not implemented for MIPS.");
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return SDOperand(); // Not reached
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}
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SDOperand MipsTargetLowering::
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@ -81,6 +81,7 @@ getRegisterNumbering(unsigned RegEnum)
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case Mips::RA : return 31;
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default: assert(0 && "Unknown register number!");
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}
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return 0; // Not reached
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}
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void MipsRegisterInfo::reMaterialize(MachineBasicBlock &MBB,
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@ -1104,6 +1104,7 @@ SDOperand PPCTargetLowering::LowerJumpTable(SDOperand Op, SelectionDAG &DAG) {
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SDOperand PPCTargetLowering::LowerGlobalTLSAddress(SDOperand Op,
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SelectionDAG &DAG) {
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assert(0 && "TLS not implemented for PPC.");
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return SDOperand(); // Not reached
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}
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SDOperand PPCTargetLowering::LowerGlobalAddress(SDOperand Op,
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@ -1197,6 +1198,7 @@ SDOperand PPCTargetLowering::LowerVAARG(SDOperand Op, SelectionDAG &DAG,
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const PPCSubtarget &Subtarget) {
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assert(0 && "VAARG in ELF32 ABI not implemented yet!");
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return SDOperand(); // Not reached
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}
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SDOperand PPCTargetLowering::LowerVASTART(SDOperand Op, SelectionDAG &DAG,
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@ -244,6 +244,7 @@ namespace {
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*Node2 = getNodeForBlock(BB2);
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return Node1 && Node2 && Node1->dominates(Node2);
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}
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return false; // Not reached
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}
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private:
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@ -1413,6 +1414,7 @@ namespace {
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if (!Node) return false;
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return Top->dominates(Node);
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}
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return false; // Not reached
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}
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// aboveOrBelow - true if the Instruction either dominates or is dominated
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