diff --git a/include/llvm/MC/MCExpr.h b/include/llvm/MC/MCExpr.h index a4dada276db..7edcd66b442 100644 --- a/include/llvm/MC/MCExpr.h +++ b/include/llvm/MC/MCExpr.h @@ -172,6 +172,7 @@ public: VK_ARM_PREL31, VK_PPC_LO, // symbol@l + VK_PPC_HI, // symbol@h VK_PPC_HA, // symbol@ha VK_PPC_TOCBASE, // symbol@tocbase VK_PPC_TOC, // symbol@toc diff --git a/lib/MC/MCExpr.cpp b/lib/MC/MCExpr.cpp index 124bd01d6ad..f59222263da 100644 --- a/lib/MC/MCExpr.cpp +++ b/lib/MC/MCExpr.cpp @@ -197,6 +197,7 @@ StringRef MCSymbolRefExpr::getVariantKindName(VariantKind Kind) { case VK_ARM_TARGET2: return "(target2)"; case VK_ARM_PREL31: return "(prel31)"; case VK_PPC_LO: return "l"; + case VK_PPC_HI: return "h"; case VK_PPC_HA: return "ha"; case VK_PPC_TOCBASE: return "tocbase"; case VK_PPC_TOC: return "toc"; @@ -281,6 +282,8 @@ MCSymbolRefExpr::getVariantKindForName(StringRef Name) { .Case("secrel32", VK_SECREL) .Case("L", VK_PPC_LO) .Case("l", VK_PPC_LO) + .Case("H", VK_PPC_HI) + .Case("h", VK_PPC_HI) .Case("HA", VK_PPC_HA) .Case("ha", VK_PPC_HA) .Case("TOCBASE", VK_PPC_TOCBASE) diff --git a/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp index 752b6f7bd13..964f2722833 100644 --- a/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp +++ b/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp @@ -546,7 +546,7 @@ ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) { } /// Extract @l/@ha modifier from expression. Recursively scan -/// the expression and check for VK_PPC_LO / VK_PPC_HA +/// the expression and check for VK_PPC_LO/HI/HA /// symbol variants. If all symbols with modifier use the same /// variant, return the corresponding PPCMCExpr::VariantKind, /// and a modified expression using the default symbol variant. @@ -569,6 +569,9 @@ ExtractModifierFromExpr(const MCExpr *E, case MCSymbolRefExpr::VK_PPC_LO: Variant = PPCMCExpr::VK_PPC_LO; break; + case MCSymbolRefExpr::VK_PPC_HI: + Variant = PPCMCExpr::VK_PPC_HI; + break; case MCSymbolRefExpr::VK_PPC_HA: Variant = PPCMCExpr::VK_PPC_HA; break; diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp b/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp index 0eb13b443fb..9a528164040 100644 --- a/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp +++ b/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp @@ -90,6 +90,9 @@ unsigned PPCELFObjectWriter::getRelocTypeInner(const MCValue &Target, case MCSymbolRefExpr::VK_PPC_LO: Type = ELF::R_PPC_ADDR16_LO; break; + case MCSymbolRefExpr::VK_PPC_HI: + Type = ELF::R_PPC_ADDR16_HI; + break; case MCSymbolRefExpr::VK_PPC_HA: Type = ELF::R_PPC_ADDR16_HA; break; diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp b/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp index b29d6ffc024..8a346b422d2 100644 --- a/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp +++ b/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp @@ -27,6 +27,7 @@ void PPCMCExpr::PrintImpl(raw_ostream &OS) const { switch (Kind) { default: llvm_unreachable("Invalid kind!"); case VK_PPC_LO: OS << "lo16"; break; + case VK_PPC_HI: OS << "hi16"; break; case VK_PPC_HA: OS << "ha16"; break; } @@ -39,6 +40,7 @@ void PPCMCExpr::PrintImpl(raw_ostream &OS) const { switch (Kind) { default: llvm_unreachable("Invalid kind!"); case VK_PPC_LO: OS << "@l"; break; + case VK_PPC_HI: OS << "@h"; break; case VK_PPC_HA: OS << "@ha"; break; } } @@ -60,6 +62,9 @@ PPCMCExpr::EvaluateAsRelocatableImpl(MCValue &Res, case VK_PPC_LO: Result = Result & 0xffff; break; + case VK_PPC_HI: + Result = (Result >> 16) & 0xffff; + break; case VK_PPC_HA: Result = ((Result >> 16) + ((Result & 0x8000) ? 1 : 0)) & 0xffff; break; @@ -77,6 +82,9 @@ PPCMCExpr::EvaluateAsRelocatableImpl(MCValue &Res, case VK_PPC_LO: Modifier = MCSymbolRefExpr::VK_PPC_LO; break; + case VK_PPC_HI: + Modifier = MCSymbolRefExpr::VK_PPC_HI; + break; case VK_PPC_HA: Modifier = MCSymbolRefExpr::VK_PPC_HA; break; diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h b/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h index 8a7b78da9a8..150acf60529 100644 --- a/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h +++ b/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h @@ -21,6 +21,7 @@ public: enum VariantKind { VK_PPC_None, VK_PPC_LO, + VK_PPC_HI, VK_PPC_HA }; @@ -44,6 +45,10 @@ public: return Create(VK_PPC_LO, Expr, Ctx); } + static const PPCMCExpr *CreateHi(const MCExpr *Expr, MCContext &Ctx) { + return Create(VK_PPC_HI, Expr, Ctx); + } + static const PPCMCExpr *CreateHa(const MCExpr *Expr, MCContext &Ctx) { return Create(VK_PPC_HA, Expr, Ctx); } diff --git a/test/MC/PowerPC/ppc64-fixup-apply.s b/test/MC/PowerPC/ppc64-fixup-apply.s index 565a8e984d6..50f74bf98dc 100644 --- a/test/MC/PowerPC/ppc64-fixup-apply.s +++ b/test/MC/PowerPC/ppc64-fixup-apply.s @@ -33,6 +33,11 @@ addi 1, 1, 2f-1b@l addis 1, 1, 1b-2f@ha 2: +addi 1, 1, target6@h +addis 1, 1, target6@h + +.set target6, 0x4321fedc + .data .quad v1 @@ -54,7 +59,7 @@ addis 1, 1, 1b-2f@ha # CHECK-NEXT: ] # CHECK-NEXT: Address: 0x0 # CHECK-NEXT: Offset: -# CHECK-NEXT: Size: 40 +# CHECK-NEXT: Size: 48 # CHECK-NEXT: Link: 0 # CHECK-NEXT: Info: 0 # CHECK-NEXT: AddressAlignment: 4 @@ -62,7 +67,7 @@ addis 1, 1, 1b-2f@ha # CHECK-NEXT: SectionData ( # CHECK-NEXT: 0000: 38211234 3C211234 38215678 3C211234 # CHECK-NEXT: 0010: 38214444 3C211111 38218001 3C211001 -# CHECK-NEXT: 0020: 38210008 3C210000 +# CHECK-NEXT: 0020: 38210008 3C210000 38214321 3C214321 # CHECK-NEXT: ) # CHECK-NEXT: } diff --git a/test/MC/PowerPC/ppc64-fixups.s b/test/MC/PowerPC/ppc64-fixups.s index 38937c80146..bb6c7be8d1d 100644 --- a/test/MC/PowerPC/ppc64-fixups.s +++ b/test/MC/PowerPC/ppc64-fixups.s @@ -47,6 +47,16 @@ # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16 target 0x0 lis 3, target +# CHECK: li 3, target@h # encoding: [0x38,0x60,A,A] +# CHECK-NEXT: # fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0 + li 3, target@h + +# CHECK: lis 3, target@h # encoding: [0x3c,0x60,A,A] +# CHECK-NEXT: # fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0 + lis 3, target@h + # CHECK: lwz 1, target@l(3) # encoding: [0x80,0x23,A,A] # CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0