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[Hexagon] Removing old halfword codegen instructions and updating const32/64 splitting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231695 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -4771,30 +4771,29 @@ def HI_PIC : ALU32_ri<(outs IntRegs:$dst), (ins bblabel:$label),
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"$dst.h = #HI($label@GOTREL)",
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[]>;
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let isReMaterializable = 1, isMoveImm = 1, hasSideEffects = 0,
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isAsmParserOnly = 1 in
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def LOi : ALU32_ri<(outs IntRegs:$dst), (ins i32imm:$imm_value),
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"$dst.l = #LO($imm_value)",
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[]>;
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let isReMaterializable = 1, isMoveImm = 1,
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isCodeGenOnly = 1, hasSideEffects = 0 in
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def HI_GOT : ALU32_ri<(outs IntRegs:$dst), (ins globaladdress:$global),
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"$dst.h = #HI($global@GOT)",
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[]>;
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let isReMaterializable = 1, isMoveImm = 1,
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isCodeGenOnly = 1, hasSideEffects = 0 in
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def LO_GOT : ALU32_ri<(outs IntRegs:$dst), (ins globaladdress:$global),
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"$dst.l = #LO($global@GOT)",
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[]>;
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let isReMaterializable = 1, isMoveImm = 1, hasSideEffects = 0,
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isAsmParserOnly = 1 in
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def HIi : ALU32_ri<(outs IntRegs:$dst), (ins i32imm:$imm_value),
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"$dst.h = #HI($imm_value)",
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[]>;
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let isReMaterializable = 1, isMoveImm = 1,
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isCodeGenOnly = 1, hasSideEffects = 0 in
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def HI_GOTREL : ALU32_ri<(outs IntRegs:$dst), (ins globaladdress:$global),
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"$dst.h = #HI($global@GOTREL)",
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[]>;
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let isReMaterializable = 1, isMoveImm = 1, hasSideEffects = 0,
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isAsmParserOnly = 1 in
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def LO_jt : ALU32_ri<(outs IntRegs:$dst), (ins jumptablebase:$jt),
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"$dst.l = #LO($jt)",
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[]>;
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let isReMaterializable = 1, isMoveImm = 1, hasSideEffects = 0,
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isAsmParserOnly = 1 in
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def HI_jt : ALU32_ri<(outs IntRegs:$dst), (ins jumptablebase:$jt),
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"$dst.h = #HI($jt)",
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[]>;
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let isReMaterializable = 1, isMoveImm = 1,
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isCodeGenOnly = 1, hasSideEffects = 0 in
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def LO_GOTREL : ALU32_ri<(outs IntRegs:$dst), (ins globaladdress:$global),
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"$dst.l = #LO($global@GOTREL)",
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[]>;
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// This pattern is incorrect. When we add small data, we should change
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// this pattern to use memw(#foo).
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@ -71,6 +71,7 @@ bool HexagonSplitConst32AndConst64::runOnMachineFunction(MachineFunction &Fn) {
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return true;
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const TargetInstrInfo *TII = Fn.getSubtarget().getInstrInfo();
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const TargetRegisterInfo *TRI = Fn.getSubtarget().getRegisterInfo();
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// Loop over all of the basic blocks
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for (MachineFunction::iterator MBBb = Fn.begin(), MBBe = Fn.end();
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@ -82,7 +83,19 @@ bool HexagonSplitConst32AndConst64::runOnMachineFunction(MachineFunction &Fn) {
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while (MII != MIE) {
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MachineInstr *MI = MII;
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int Opc = MI->getOpcode();
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if (Opc == Hexagon::CONST32_set) {
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if (Opc == Hexagon::CONST32_set_jt) {
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int DestReg = MI->getOperand(0).getReg();
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MachineOperand &Symbol = MI->getOperand (1);
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BuildMI (*MBB, MII, MI->getDebugLoc(),
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TII->get(Hexagon::A2_tfrsi), DestReg).addOperand(Symbol);
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// MBB->erase returns the iterator to the next instruction, which is the
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// one we want to process next
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MII = MBB->erase (MI);
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continue;
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}
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else if (Opc == Hexagon::CONST32_Int_Real &&
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MI->getOperand(1).isBlockAddress()) {
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int DestReg = MI->getOperand(0).getReg();
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MachineOperand &Symbol = MI->getOperand (1);
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@ -95,69 +108,53 @@ bool HexagonSplitConst32AndConst64::runOnMachineFunction(MachineFunction &Fn) {
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MII = MBB->erase (MI);
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continue;
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}
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else if (Opc == Hexagon::CONST32_set_jt) {
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int DestReg = MI->getOperand(0).getReg();
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MachineOperand &Symbol = MI->getOperand (1);
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BuildMI (*MBB, MII, MI->getDebugLoc(),
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TII->get(Hexagon::LO_jt), DestReg).addOperand(Symbol);
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BuildMI (*MBB, MII, MI->getDebugLoc(),
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TII->get(Hexagon::HI_jt), DestReg).addOperand(Symbol);
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// MBB->erase returns the iterator to the next instruction, which is the
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// one we want to process next
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else if (Opc == Hexagon::CONST32_Int_Real ||
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Opc == Hexagon::CONST32_Float_Real) {
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int DestReg = MI->getOperand(0).getReg();
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// We have to convert an FP immediate into its corresponding integer
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// representation
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int64_t ImmValue;
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if (Opc == Hexagon::CONST32_Float_Real) {
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APFloat Val = MI->getOperand(1).getFPImm()->getValueAPF();
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ImmValue = *Val.bitcastToAPInt().getRawData();
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}
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else
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ImmValue = MI->getOperand(1).getImm();
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BuildMI(*MBB, MII, MI->getDebugLoc(),
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TII->get(Hexagon::A2_tfrsi), DestReg).addImm(ImmValue);
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MII = MBB->erase (MI);
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continue;
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}
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else if (Opc == Hexagon::CONST32_Label) {
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else if (Opc == Hexagon::CONST64_Int_Real ||
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Opc == Hexagon::CONST64_Float_Real) {
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int DestReg = MI->getOperand(0).getReg();
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MachineOperand &Symbol = MI->getOperand (1);
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BuildMI (*MBB, MII, MI->getDebugLoc(),
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TII->get(Hexagon::LO_PIC), DestReg).addOperand(Symbol);
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BuildMI (*MBB, MII, MI->getDebugLoc(),
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TII->get(Hexagon::HI_PIC), DestReg).addOperand(Symbol);
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// MBB->erase returns the iterator to the next instruction, which is the
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// one we want to process next
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MII = MBB->erase (MI);
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continue;
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}
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else if (Opc == Hexagon::CONST32_Int_Real) {
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int DestReg = MI->getOperand(0).getReg();
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int64_t ImmValue = MI->getOperand(1).getImm ();
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// We have to convert an FP immediate into its corresponding integer
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// representation
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int64_t ImmValue;
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if (Opc == Hexagon::CONST64_Float_Real) {
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APFloat Val = MI->getOperand(1).getFPImm()->getValueAPF();
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ImmValue = *Val.bitcastToAPInt().getRawData();
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}
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else
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ImmValue = MI->getOperand(1).getImm();
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BuildMI (*MBB, MII, MI->getDebugLoc(),
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TII->get(Hexagon::LOi), DestReg).addImm(ImmValue);
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BuildMI (*MBB, MII, MI->getDebugLoc(),
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TII->get(Hexagon::HIi), DestReg).addImm(ImmValue);
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MII = MBB->erase (MI);
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continue;
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}
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else if (Opc == Hexagon::CONST64_Int_Real) {
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int DestReg = MI->getOperand(0).getReg();
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int64_t ImmValue = MI->getOperand(1).getImm ();
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unsigned DestLo = Fn.getSubtarget().getRegisterInfo()->getSubReg(
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DestReg, Hexagon::subreg_loreg);
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unsigned DestHi = Fn.getSubtarget().getRegisterInfo()->getSubReg(
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DestReg, Hexagon::subreg_hireg);
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unsigned DestLo = TRI->getSubReg(DestReg, Hexagon::subreg_loreg);
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unsigned DestHi = TRI->getSubReg(DestReg, Hexagon::subreg_hireg);
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int32_t LowWord = (ImmValue & 0xFFFFFFFF);
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int32_t HighWord = (ImmValue >> 32) & 0xFFFFFFFF;
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// Lower Registers Lower Half
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BuildMI(*MBB, MII, MI->getDebugLoc(),
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TII->get(Hexagon::A2_tfrsi), DestLo).addImm(LowWord);
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BuildMI (*MBB, MII, MI->getDebugLoc(),
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TII->get(Hexagon::LOi), DestLo).addImm(LowWord);
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// Lower Registers Higher Half
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BuildMI (*MBB, MII, MI->getDebugLoc(),
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TII->get(Hexagon::HIi), DestLo).addImm(LowWord);
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// Higher Registers Lower Half
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BuildMI (*MBB, MII, MI->getDebugLoc(),
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TII->get(Hexagon::LOi), DestHi).addImm(HighWord);
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// Higher Registers Higher Half.
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BuildMI (*MBB, MII, MI->getDebugLoc(),
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TII->get(Hexagon::HIi), DestHi).addImm(HighWord);
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TII->get(Hexagon::A2_tfrsi), DestHi).addImm(HighWord);
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MII = MBB->erase (MI);
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continue;
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}
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}
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++MII;
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}
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}
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@ -76,7 +76,6 @@ char HexagonSplitTFRCondSets::ID = 0;
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bool HexagonSplitTFRCondSets::runOnMachineFunction(MachineFunction &Fn) {
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const TargetInstrInfo *TII = Fn.getSubtarget().getInstrInfo();
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// Loop over all of the basic blocks.
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for (MachineFunction::iterator MBBb = Fn.begin(), MBBe = Fn.end();
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