From d303a2058cdfac5f11ae65762d68577f34e9abdb Mon Sep 17 00:00:00 2001
From: Brian Gaeke <gaeke@uiuc.edu>
Date: Fri, 16 Jul 2004 10:31:47 +0000
Subject: [PATCH] Add special handling for pseudo-instructions (print them as
 comments).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14882 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/Sparc/SparcAsmPrinter.cpp     | 18 ++++++++++++++++++
 lib/Target/SparcV8/SparcV8AsmPrinter.cpp | 18 ++++++++++++++++++
 2 files changed, 36 insertions(+)

diff --git a/lib/Target/Sparc/SparcAsmPrinter.cpp b/lib/Target/Sparc/SparcAsmPrinter.cpp
index 64060abae68..34cdade711b 100644
--- a/lib/Target/Sparc/SparcAsmPrinter.cpp
+++ b/lib/Target/Sparc/SparcAsmPrinter.cpp
@@ -455,6 +455,19 @@ static bool isStoreInstruction (const MachineInstr *MI) {
   }
 }
 
+static bool isPseudoInstruction (const MachineInstr *MI) {
+  switch (MI->getOpcode ()) {
+  case V8::PHI:
+  case V8::ADJCALLSTACKUP:
+  case V8::ADJCALLSTACKDOWN:
+  case V8::IMPLICIT_USE:
+  case V8::IMPLICIT_DEF:
+    return true;
+  default:
+    return false;
+  }
+}
+
 /// printBaseOffsetPair - Print two consecutive operands of MI, starting at #i,
 /// which form a base + offset pair (which may have brackets around it, if
 /// brackets is true, or may be in the form base - constant, if offset is a
@@ -484,6 +497,11 @@ void V8Printer::printMachineInstruction(const MachineInstr *MI) {
   unsigned Opcode = MI->getOpcode();
   const TargetInstrInfo &TII = *TM.getInstrInfo();
   const TargetInstrDescriptor &Desc = TII.get(Opcode);
+
+  // If it's a pseudo-instruction, comment it out.
+  if (isPseudoInstruction (MI))
+    O << "! ";
+
   O << Desc.Name << " ";
   
   // Printing memory instructions is a special case.
diff --git a/lib/Target/SparcV8/SparcV8AsmPrinter.cpp b/lib/Target/SparcV8/SparcV8AsmPrinter.cpp
index 64060abae68..34cdade711b 100644
--- a/lib/Target/SparcV8/SparcV8AsmPrinter.cpp
+++ b/lib/Target/SparcV8/SparcV8AsmPrinter.cpp
@@ -455,6 +455,19 @@ static bool isStoreInstruction (const MachineInstr *MI) {
   }
 }
 
+static bool isPseudoInstruction (const MachineInstr *MI) {
+  switch (MI->getOpcode ()) {
+  case V8::PHI:
+  case V8::ADJCALLSTACKUP:
+  case V8::ADJCALLSTACKDOWN:
+  case V8::IMPLICIT_USE:
+  case V8::IMPLICIT_DEF:
+    return true;
+  default:
+    return false;
+  }
+}
+
 /// printBaseOffsetPair - Print two consecutive operands of MI, starting at #i,
 /// which form a base + offset pair (which may have brackets around it, if
 /// brackets is true, or may be in the form base - constant, if offset is a
@@ -484,6 +497,11 @@ void V8Printer::printMachineInstruction(const MachineInstr *MI) {
   unsigned Opcode = MI->getOpcode();
   const TargetInstrInfo &TII = *TM.getInstrInfo();
   const TargetInstrDescriptor &Desc = TII.get(Opcode);
+
+  // If it's a pseudo-instruction, comment it out.
+  if (isPseudoInstruction (MI))
+    O << "! ";
+
   O << Desc.Name << " ";
   
   // Printing memory instructions is a special case.