6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-07-24 22:24:54 +00:00
Code Issues Projects Releases Wiki Activity

Initial ARM/Thumb disassembler check-in. It consists of a tablgen backend

Browse Source 
(RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.

Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
instructions to help disassembly.

We also changed the output of the addressing modes to omit the '+' from the
assembler syntax #+/-<imm> or +/-<Rm>.  See, for example, A8.6.57/58/60.

And modified test cases to not expect '+' in +reg or #+num.  For example,

; CHECK:       ldr.w	r9, [r7, #28]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98637 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Johnny Chen
2010-03-16 16:36:54 +00:00
parent ea7f22c31d
commit d30a98e43a
33 changed files with 9189 additions and 168 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
lib/Target/ARM/ARMAddressingModes.h
View File

@@ -35,6 +35,10 @@ namespace ARM_AM {
add = '+', sub = '-'
};
static inline const char *getAddrOpcStr(AddrOpc Op) {
return Op == sub ? "-" : "";
}
static inline const char *getShiftOpcStr(ShiftOpc Op) {
switch (Op) {
default: assert(0 && "Unknown shift opc!");
@@ -127,6 +131,20 @@ namespace ARM_AM {
return (Imm >> 8) * 2;
}
/// getSOImmValOneRotate - Try to handle Imm with an immediate shifter
/// operand, computing the rotate amount to use. If this immediate value
/// cannot be handled with a single shifter-op, return 0.
static inline unsigned getSOImmValOneRotate(unsigned Imm) {
// A5.2.4 Constants with multiple encodings
// The lowest unsigned value of rotation wins!
for (unsigned R = 1; R <= 15; ++R)
if ((Imm & rotr32(~255U, 2*R)) == 0)
return 2*R;
// Failed to find a suitable rotate amount.
return 0;
}
/// getSOImmValRotate - Try to handle Imm with an immediate shifter operand,
/// computing the rotate amount to use. If this immediate value cannot be
/// handled with a single shifter-op, determine a good rotate amount that will
@@ -179,7 +197,7 @@ namespace ARM_AM {
// of zero.
if ((Arg & ~255U) == 0) return Arg;
unsigned RotAmt = getSOImmValRotate(Arg);
unsigned RotAmt = getSOImmValOneRotate(Arg);
// If this cannot be handled with a single shifter_op, bail out.
if (rotr32(~255U, RotAmt) & Arg)