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[Sparc] Add support for flush instruction.
Differential Revision: http://reviews.llvm.org/D9833 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241460 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -306,6 +306,9 @@ def : InstAlias<"mov $rs2, $rd", (ORrr IntRegs:$rd, G0, IntRegs:$rs2)>;
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// mov simm13, rd -> or %g0, simm13, rd
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def : InstAlias<"mov $simm13, $rd", (ORri IntRegs:$rd, G0, i32imm:$simm13)>;
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// flush -> flush %g0
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def : InstAlias<"flush", (FLUSH), 0>;
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// set value, rd
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// (turns into a sequence of sethi+or, depending on the value)
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// def : InstAlias<"set $val, $rd", (ORri IntRegs:$rd, (SETHIi (HI22 imm:$val)), (LO10 imm:$val))>;
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@ -828,6 +828,20 @@ let rd = 0 in
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def UNIMP : F2_1<0b000, (outs), (ins i32imm:$imm22),
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"unimp $imm22", []>;
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// Section B.32 - Flush Instruction Memory
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let rd = 0 in {
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def FLUSHrr : F3_1<2, 0b111011, (outs), (ins MEMrr:$addr),
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"flush $addr", []>;
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def FLUSHri : F3_2<2, 0b111011, (outs), (ins MEMri:$addr),
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"flush $addr", []>;
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// The no-arg FLUSH is only here for the benefit of the InstAlias
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// "flush", which cannot seem to use FLUSHrr, due to the inability
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// to construct a MEMrr with fixed G0 registers.
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let rs1 = 0, rs2 = 0 in
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def FLUSH : F3_1<2, 0b111011, (outs), (ins), "flush %g0", []>;
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}
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// Section B.33 - Floating-point Operate (FPop) Instructions
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// Convert Integer to Floating-point Instructions, p. 141
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@ -72,3 +72,13 @@
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st %o2, [%g1]
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! CHECK: sta %o2, [%i0+%l6] 131 ! encoding: [0xd4,0xa6,0x10,0x76]
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sta %o2, [%i0 + %l6] 131
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! CHECK: flush %g1+%g2 ! encoding: [0x81,0xd8,0x40,0x02]
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flush %g1 + %g2
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! CHECK: flush %g1+8 ! encoding: [0x81,0xd8,0x60,0x08]
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flush %g1 + 8
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! CHECK: flush %g1 ! encoding: [0x81,0xd8,0x40,0x00]
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flush %g1
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! Not specified in manual, but accepted by gas.
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! CHECK: flush %g0 ! encoding: [0x81,0xd8,0x00,0x00]
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flush
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