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Mark shortening NaN conversions as Inexact. PR 2856.
Improve description of unsupported formats. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57185 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1727,11 +1727,12 @@ APFloat::convert(const fltSemantics &toSemantics,
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APInt::tcShiftLeft(significandParts(), newPartCount, shift);
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else if (shift < 0)
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APInt::tcShiftRight(significandParts(), newPartCount, -shift);
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// If the new size is shorter, we lost information.
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fs = (shift < 0) ? opInexact : opOK;
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// gcc forces the Quiet bit on, which means (float)(double)(float_sNan)
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// does not give you back the same bits. This is dubious, and we
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// don't currently do it. You're really supposed to get
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// an invalid operation signal at runtime, but nobody does that.
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fs = opOK;
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} else {
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semantics = &toSemantics;
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fs = opOK;
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@ -2633,11 +2634,13 @@ APFloat::convertToDouble() const
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return api.bitsToDouble();
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}
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/// Integer bit is explicit in this format. Current Intel book does not
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/// define meaning of:
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/// exponent = all 1's, integer bit not set.
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/// exponent = 0, integer bit set. (formerly "psuedodenormals")
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/// exponent!=0 nor all 1's, integer bit not set. (formerly "unnormals")
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/// Integer bit is explicit in this format. Intel hardware (387 and later)
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/// does not support these bit patterns:
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/// exponent = all 1's, integer bit 0, significand 0 ("pseudoinfinity")
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/// exponent = all 1's, integer bit 0, significand nonzero ("pseudoNaN")
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/// exponent = 0, integer bit 1 ("pseudodenormal")
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/// exponent!=0 nor all 1's, integer bit 0 ("unnormal")
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/// At the moment, the first two are treated as NaNs, the second two as Normal.
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void
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APFloat::initFromF80LongDoubleAPInt(const APInt &api)
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{
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