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[X86] Add ISel patterns to select 'f32_to_f16' and 'f16_to_f32' dag nodes.

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This patch adds tablegen patterns to select F16C float-to-half-float
conversion instructions from 'f32_to_f16' and 'f16_to_f32' dag nodes.

If the target doesn't have F16C, then 'f32_to_f16' and 'f16_to_f32'
are expanded into library calls.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212293 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrea Di Biagio 2014-07-03 21:51:06 +00:00
parent bc04f3c793
commit d4167d0b29
3 changed files with 87 additions and 0 deletions
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8
lib/Target/X86/X86ISelLowering.cpp
View File

@ -515,6 +515,14 @@ void X86TargetLowering::resetOperationActions() {
}
}
// Special handling for half-precision floating point conversions.
// If we don't have F16C support, then lower half float conversions
// into library calls.
if (TM.Options.UseSoftFloat || !Subtarget->hasF16C()) {
setOperationAction(ISD::FP16_TO_FP32, MVT::f32, Expand);
setOperationAction(ISD::FP32_TO_FP16, MVT::i16, Expand);
}
if (Subtarget->hasPOPCNT()) {
setOperationAction(ISD::CTPOP , MVT::i8 , Promote);
} else {

15
lib/Target/X86/X86InstrSSE.td
View File

@ -8538,6 +8538,21 @@ let Predicates = [HasF16C] in {
(VCVTPH2PSrm addr:$src)>;
}
// Patterns for matching conversions from float to half-float and vice versa.
let Predicates = [HasF16C] in {
def : Pat<(f32_to_f16 FR32:$src),
(i16 (EXTRACT_SUBREG (VMOVPDI2DIrr (VCVTPS2PHrr
(COPY_TO_REGCLASS FR32:$src, VR128), 0)), sub_16bit))>;
def : Pat<(f16_to_f32 GR16:$src),
(f32 (COPY_TO_REGCLASS (VCVTPH2PSrr
(COPY_TO_REGCLASS (MOVSX32rr16 GR16:$src), VR128)), FR32)) >;
def : Pat<(f16_to_f32 (i16 (f32_to_f16 FR32:$src))),
(f32 (COPY_TO_REGCLASS (VCVTPH2PSrr
(VCVTPS2PHrr (COPY_TO_REGCLASS FR32:$src, VR128), 0)), FR32)) >;
}
//===----------------------------------------------------------------------===//
// AVX2 Instructions
//===----------------------------------------------------------------------===//

64
test/CodeGen/X86/cvt16.ll Normal file
View File

@ -0,0 +1,64 @@
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c | FileCheck %s -check-prefix=CHECK -check-prefix=LIBCALL
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c | FileCheck %s -check-prefix=CHECK -check-prefix=F16C
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -soft-float=1 -mattr=-f16c | FileCheck %s -check-prefix=CHECK -check-prefix=SOFTFLOAT
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -soft-float=1 -mattr=+f16c | FileCheck %s -check-prefix=CHECK -check-prefix=SOFTFLOAT
; This is a test for float to half float conversions on x86-64.
;
; If flag -soft-float is set, or if there is no F16C support, then:
; 1) half float to float conversions are
; translated into calls to __gnu_h2f_ieee defined
; by the compiler runtime library;
; 2) float to half float conversions are translated into calls
; to __gnu_f2h_ieee which expected to be defined by the
; compiler runtime library.
;
; Otherwise (we have F16C support):
; 1) half float to float conversion are translated using
; vcvtph2ps instructions;
; 2) float to half float conversions are translated using
; vcvtps2ph instructions
define void @test1(float %src, i16* %dest) {
%1 = tail call i16 @llvm.convert.to.fp16(float %src)
store i16 %1, i16* %dest, align 2
ret void
}
; CHECK-LABEL: test1
; LIBCALL: callq __gnu_f2h_ieee
; SOFTFLOAT: callq __gnu_f2h_ieee
; F16C: vcvtps2ph
; CHECK: ret
define float @test2(i16* nocapture %src) {
%1 = load i16* %src, align 2
%2 = tail call float @llvm.convert.from.fp16(i16 %1)
ret float %2
}
; CHECK-LABEL: test2:
; LIBCALL: jmp __gnu_h2f_ieee
; SOFTFLOAT: callq __gnu_h2f_ieee
; F16C: vcvtph2ps
; F16C: ret
define float @test3(float %src) nounwind uwtable readnone {
%1 = tail call i16 @llvm.convert.to.fp16(float %src)
%2 = tail call float @llvm.convert.from.fp16(i16 %1)
ret float %2
}
; CHECK-LABEL: test3:
; LIBCALL: callq __gnu_f2h_ieee
; LIBCALL: jmp __gnu_h2f_ieee
; SOFTFLOAT: callq __gnu_f2h_ieee
; SOFTFLOAT: callq __gnu_h2f_ieee
; F16C: vcvtps2ph
; F16C-NEXT: vcvtph2ps
; F16C: ret
declare float @llvm.convert.from.fp16(i16) nounwind readnone
declare i16 @llvm.convert.to.fp16(float) nounwind readnone