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https://github.com/c64scene-ar/llvm-6502.git
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Very basic compare support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113440 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -113,6 +113,7 @@ class ARMFastISel : public FastISel {
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virtual bool ARMSelectLoad(const Instruction *I);
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virtual bool ARMSelectLoad(const Instruction *I);
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virtual bool ARMSelectStore(const Instruction *I);
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virtual bool ARMSelectStore(const Instruction *I);
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virtual bool ARMSelectBranch(const Instruction *I);
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virtual bool ARMSelectBranch(const Instruction *I);
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virtual bool ARMSelectCmp(const Instruction *I);
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// Utility routines.
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// Utility routines.
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private:
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private:
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@ -650,6 +651,50 @@ bool ARMFastISel::ARMSelectBranch(const Instruction *I) {
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return true;
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return true;
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}
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}
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bool ARMFastISel::ARMSelectCmp(const Instruction *I) {
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const CmpInst *CI = cast<CmpInst>(I);
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EVT VT;
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const Type *Ty = CI->getOperand(0)->getType();
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if (!isTypeLegal(Ty, VT))
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return false;
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bool isFloat = (Ty->isDoubleTy() || Ty->isFloatTy());
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if (isFloat && !Subtarget->hasVFP2())
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return false;
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unsigned CmpOpc;
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switch (VT.getSimpleVT().SimpleTy) {
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default: return false;
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// TODO: Verify compares.
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case MVT::f32:
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CmpOpc = ARM::VCMPES;
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break;
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case MVT::f64:
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CmpOpc = ARM::VCMPED;
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break;
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case MVT::i32:
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CmpOpc = isThumb ? ARM::t2CMPrr : ARM::CMPrr;
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break;
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}
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unsigned Arg1 = getRegForValue(CI->getOperand(0));
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if (Arg1 == 0) return false;
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unsigned Arg2 = getRegForValue(CI->getOperand(1));
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if (Arg2 == 0) return false;
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(CmpOpc))
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.addReg(Arg1).addReg(Arg2));
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// For floating point we need to move the result to a register we can
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// actually do something with.
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if (isFloat)
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
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TII.get(ARM::FMSTAT)));
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return true;
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}
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// TODO: SoftFP support.
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// TODO: SoftFP support.
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bool ARMFastISel::TargetSelectInstruction(const Instruction *I) {
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bool ARMFastISel::TargetSelectInstruction(const Instruction *I) {
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// No Thumb-1 for now.
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// No Thumb-1 for now.
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@ -662,6 +707,9 @@ bool ARMFastISel::TargetSelectInstruction(const Instruction *I) {
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return ARMSelectStore(I);
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return ARMSelectStore(I);
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case Instruction::Br:
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case Instruction::Br:
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return ARMSelectBranch(I);
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return ARMSelectBranch(I);
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case Instruction::ICmp:
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case Instruction::FCmp:
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return ARMSelectCmp(I);
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default: break;
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default: break;
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}
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}
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return false;
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return false;
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