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[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. XCore edition

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207501 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2014-04-29 07:57:00 +00:00
parent 5bbe6121c3
commit d4657fb0c1
15 changed files with 112 additions and 111 deletions
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2
lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
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@ -42,7 +42,7 @@ public:
const MemoryObject &region,
uint64_t address,
raw_ostream &vStream,
raw_ostream &cStream) const;
raw_ostream &cStream) const override;
};
}

4
lib/Target/XCore/InstPrinter/XCoreInstPrinter.h
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@ -31,8 +31,8 @@ public:
void printInstruction(const MCInst *MI, raw_ostream &O);
static const char *getRegisterName(unsigned RegNo);
virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
void printRegName(raw_ostream &OS, unsigned RegNo) const override;
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) override;
private:
void printInlineJT(const MCInst *MI, int opNum, raw_ostream &O);
void printInlineJT32(const MCInst *MI, int opNum, raw_ostream &O);

2
lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h
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@ -21,7 +21,7 @@ namespace llvm {
class Target;
class XCoreMCAsmInfo : public MCAsmInfoELF {
virtual void anchor();
void anchor() override;
public:
explicit XCoreMCAsmInfo(StringRef TT);
};

14
lib/Target/XCore/XCoreAsmPrinter.cpp
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@ -59,7 +59,7 @@ namespace {
: AsmPrinter(TM, Streamer), Subtarget(TM.getSubtarget<XCoreSubtarget>()),
MCInstLowering(*this) {}
virtual const char *getPassName() const {
const char *getPassName() const override {
return "XCore Assembly Printer";
}
@ -71,18 +71,18 @@ namespace {
void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
unsigned AsmVariant, const char *ExtraCode,
raw_ostream &O);
raw_ostream &O) override;
bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
unsigned AsmVariant, const char *ExtraCode,
raw_ostream &O) override;
void emitArrayBound(MCSymbol *Sym, const GlobalVariable *GV);
virtual void EmitGlobalVariable(const GlobalVariable *GV);
void EmitGlobalVariable(const GlobalVariable *GV) override;
void EmitFunctionEntryLabel();
void EmitInstruction(const MachineInstr *MI);
void EmitFunctionBodyStart();
void EmitFunctionBodyEnd();
void EmitFunctionEntryLabel() override;
void EmitInstruction(const MachineInstr *MI) override;
void EmitFunctionBodyStart() override;
void EmitFunctionBodyEnd() override;
};
} // end of anonymous namespace

27
lib/Target/XCore/XCoreFrameLowering.h
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@ -27,29 +27,30 @@ namespace llvm {
/// emitProlog/emitEpilog - These methods insert prolog and epilog code into
/// the function.
void emitPrologue(MachineFunction &MF) const;
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
void emitPrologue(MachineFunction &MF) const override;
void emitEpilogue(MachineFunction &MF,
MachineBasicBlock &MBB) const override;
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
const std::vector<CalleeSavedInfo> &CSI,
const TargetRegisterInfo *TRI) const;
MachineBasicBlock::iterator MI,
const std::vector<CalleeSavedInfo> &CSI,
const TargetRegisterInfo *TRI) const override;
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
const std::vector<CalleeSavedInfo> &CSI,
const TargetRegisterInfo *TRI) const;
MachineBasicBlock::iterator MI,
const std::vector<CalleeSavedInfo> &CSI,
const TargetRegisterInfo *TRI) const override;
void eliminateCallFramePseudoInstr(MachineFunction &MF,
MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const;
MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const override;
bool hasFP(const MachineFunction &MF) const;
bool hasFP(const MachineFunction &MF) const override;
void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
RegScavenger *RS = nullptr) const;
RegScavenger *RS = nullptr) const override;
void processFunctionBeforeFrameFinalized(MachineFunction &MF,
RegScavenger *RS = nullptr) const;
RegScavenger *RS = nullptr) const override;
//! Stack slot size (4 bytes)
static int stackSlotSize() {

4
lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
View File

@ -26,9 +26,9 @@ namespace {
static char ID;
XCoreFTAOElim() : MachineFunctionPass(ID) {}
virtual bool runOnMachineFunction(MachineFunction &Fn);
bool runOnMachineFunction(MachineFunction &Fn) override;
virtual const char *getPassName() const {
const char *getPassName() const override {
return "XCore FRAME_TO_ARGS_OFFSET Elimination";
}
};

4
lib/Target/XCore/XCoreISelDAGToDAG.cpp
View File

@ -44,7 +44,7 @@ namespace {
: SelectionDAGISel(TM, OptLevel),
Subtarget(*TM.getSubtargetImpl()) { }
SDNode *Select(SDNode *N);
SDNode *Select(SDNode *N) override;
SDNode *SelectBRIND(SDNode *N);
/// getI32Imm - Return a target constant with the specified value, of type
@ -70,7 +70,7 @@ namespace {
bool SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
std::vector<SDValue> &OutOps) override;
virtual const char *getPassName() const {
const char *getPassName() const override {
return "XCore DAG->DAG Pattern Instruction Selection";
}

51
lib/Target/XCore/XCoreISelLowering.h
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@ -97,31 +97,30 @@ namespace llvm {
explicit XCoreTargetLowering(XCoreTargetMachine &TM);
using TargetLowering::isZExtFree;
virtual bool isZExtFree(SDValue Val, EVT VT2) const;
bool isZExtFree(SDValue Val, EVT VT2) const override;
virtual unsigned getJumpTableEncoding() const;
virtual MVT getScalarShiftAmountTy(EVT LHSTy) const { return MVT::i32; }
unsigned getJumpTableEncoding() const override;
MVT getScalarShiftAmountTy(EVT LHSTy) const override { return MVT::i32; }
/// LowerOperation - Provide custom lowering hooks for some operations.
virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
/// ReplaceNodeResults - Replace the results of node with an illegal result
/// type with new values built out of custom code.
///
virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
SelectionDAG &DAG) const;
void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
SelectionDAG &DAG) const override;
/// getTargetNodeName - This method returns the name of a target specific
// DAG node.
virtual const char *getTargetNodeName(unsigned Opcode) const;
const char *getTargetNodeName(unsigned Opcode) const override;
virtual MachineBasicBlock *
MachineBasicBlock *
EmitInstrWithCustomInserter(MachineInstr *MI,
MachineBasicBlock *MBB) const;
MachineBasicBlock *MBB) const override;
virtual bool isLegalAddressingMode(const AddrMode &AM,
Type *Ty) const;
bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
private:
const XCoreTargetMachine &TM;
@ -176,44 +175,44 @@ namespace llvm {
// Inline asm support
std::pair<unsigned, const TargetRegisterClass*>
getRegForInlineAsmConstraint(const std::string &Constraint,
MVT VT) const;
MVT VT) const override;
// Expand specifics
SDValue TryExpandADDWithMul(SDNode *Op, SelectionDAG &DAG) const;
SDValue ExpandADDSUB(SDNode *Op, SelectionDAG &DAG) const;
virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
virtual void computeMaskedBitsForTargetNode(const SDValue Op,
APInt &KnownZero,
APInt &KnownOne,
const SelectionDAG &DAG,
unsigned Depth = 0) const;
void computeMaskedBitsForTargetNode(const SDValue Op,
APInt &KnownZero,
APInt &KnownOne,
const SelectionDAG &DAG,
unsigned Depth = 0) const override;
virtual SDValue
SDValue
LowerFormalArguments(SDValue Chain,
CallingConv::ID CallConv,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
SDLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals) const;
SmallVectorImpl<SDValue> &InVals) const override;
virtual SDValue
SDValue
LowerCall(TargetLowering::CallLoweringInfo &CLI,
SmallVectorImpl<SDValue> &InVals) const;
SmallVectorImpl<SDValue> &InVals) const override;
virtual SDValue
SDValue
LowerReturn(SDValue Chain,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<SDValue> &OutVals,
SDLoc dl, SelectionDAG &DAG) const;
SDLoc dl, SelectionDAG &DAG) const override;
virtual bool
bool
CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
LLVMContext &Context) const;
LLVMContext &Context) const override;
};
}

68
lib/Target/XCore/XCoreInstrInfo.h
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@ -32,55 +32,55 @@ public:
/// such, whenever a client has an instance of instruction info, it should
/// always be able to get register info as well (through this method).
///
virtual const TargetRegisterInfo &getRegisterInfo() const { return RI; }
const TargetRegisterInfo &getRegisterInfo() const { return RI; }
/// isLoadFromStackSlot - If the specified machine instruction is a direct
/// load from a stack slot, return the virtual or physical register number of
/// the destination along with the FrameIndex of the loaded stack slot. If
/// not, return 0. This predicate must return 0 if the instruction has
/// any side effects other than loading from the stack slot.
virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
int &FrameIndex) const;
unsigned isLoadFromStackSlot(const MachineInstr *MI,
int &FrameIndex) const override;
/// isStoreToStackSlot - If the specified machine instruction is a direct
/// store to a stack slot, return the virtual or physical register number of
/// the source reg along with the FrameIndex of the loaded stack slot. If
/// not, return 0. This predicate must return 0 if the instruction has
/// any side effects other than storing to the stack slot.
virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
int &FrameIndex) const;
virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
MachineBasicBlock *&FBB,
SmallVectorImpl<MachineOperand> &Cond,
bool AllowModify) const;
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
const SmallVectorImpl<MachineOperand> &Cond,
DebugLoc DL) const;
virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
unsigned isStoreToStackSlot(const MachineInstr *MI,
int &FrameIndex) const override;
virtual void copyPhysReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I, DebugLoc DL,
unsigned DestReg, unsigned SrcReg,
bool KillSrc) const;
bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
MachineBasicBlock *&FBB,
SmallVectorImpl<MachineOperand> &Cond,
bool AllowModify) const override;
virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned SrcReg, bool isKill, int FrameIndex,
const TargetRegisterClass *RC,
const TargetRegisterInfo *TRI) const;
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
const SmallVectorImpl<MachineOperand> &Cond,
DebugLoc DL) const override;
virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, int FrameIndex,
const TargetRegisterClass *RC,
const TargetRegisterInfo *TRI) const;
unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
virtual bool ReverseBranchCondition(
SmallVectorImpl<MachineOperand> &Cond) const;
void copyPhysReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I, DebugLoc DL,
unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;
void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned SrcReg, bool isKill, int FrameIndex,
const TargetRegisterClass *RC,
const TargetRegisterInfo *TRI) const override;
void loadRegFromStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, int FrameIndex,
const TargetRegisterClass *RC,
const TargetRegisterInfo *TRI) const override;
bool ReverseBranchCondition(
SmallVectorImpl<MachineOperand> &Cond) const override;
// Emit code before MBBI to load immediate value into physical register Reg.
// Returns an iterator to the new instruction.

2
lib/Target/XCore/XCoreLowerThreadLocal.cpp
View File

@ -48,7 +48,7 @@ namespace {
bool lowerGlobal(GlobalVariable *GV);
bool runOnModule(Module &M);
bool runOnModule(Module &M) override;
};
}

15
lib/Target/XCore/XCoreRegisterInfo.h
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@ -29,22 +29,23 @@ public:
/// Code Generation virtual methods...
const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF =nullptr) const;
const MCPhysReg *
getCalleeSavedRegs(const MachineFunction *MF =nullptr) const override;
BitVector getReservedRegs(const MachineFunction &MF) const;
BitVector getReservedRegs(const MachineFunction &MF) const override;
bool requiresRegisterScavenging(const MachineFunction &MF) const;
bool requiresRegisterScavenging(const MachineFunction &MF) const override;
bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const;
bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;
bool useFPForScavengingIndex(const MachineFunction &MF) const;
bool useFPForScavengingIndex(const MachineFunction &MF) const override;
void eliminateFrameIndex(MachineBasicBlock::iterator II,
int SPAdj, unsigned FIOperandNum,
RegScavenger *RS = nullptr) const;
RegScavenger *RS = nullptr) const override;
// Debug information queries.
unsigned getFrameRegister(const MachineFunction &MF) const;
unsigned getFrameRegister(const MachineFunction &MF) const override;
//! Return whether to emit frame moves
static bool needsFrameMoves(const MachineFunction &MF);

4
lib/Target/XCore/XCoreSelectionDAGInfo.h
View File

@ -25,14 +25,14 @@ public:
explicit XCoreSelectionDAGInfo(const XCoreTargetMachine &TM);
~XCoreSelectionDAGInfo();
virtual SDValue
SDValue
EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
SDValue Chain,
SDValue Op1, SDValue Op2,
SDValue Op3, unsigned Align, bool isVolatile,
bool AlwaysInline,
MachinePointerInfo DstPtrInfo,
MachinePointerInfo SrcPtrInfo) const;
MachinePointerInfo SrcPtrInfo) const override;
};
}

6
lib/Target/XCore/XCoreTargetMachine.cpp
View File

@ -46,9 +46,9 @@ public:
return getTM<XCoreTargetMachine>();
}
virtual bool addPreISel();
virtual bool addInstSelector();
virtual bool addPreEmitPass();
bool addPreISel() override;
bool addInstSelector() override;
bool addPreEmitPass() override;
};
} // namespace

18
lib/Target/XCore/XCoreTargetMachine.h
View File

@ -37,28 +37,28 @@ public:
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL);
virtual const XCoreInstrInfo *getInstrInfo() const { return &InstrInfo; }
virtual const XCoreFrameLowering *getFrameLowering() const {
const XCoreInstrInfo *getInstrInfo() const override { return &InstrInfo; }
const XCoreFrameLowering *getFrameLowering() const override {
return &FrameLowering;
}
virtual const XCoreSubtarget *getSubtargetImpl() const { return &Subtarget; }
virtual const XCoreTargetLowering *getTargetLowering() const {
const XCoreSubtarget *getSubtargetImpl() const override { return &Subtarget; }
const XCoreTargetLowering *getTargetLowering() const override {
return &TLInfo;
}
virtual const XCoreSelectionDAGInfo* getSelectionDAGInfo() const {
const XCoreSelectionDAGInfo* getSelectionDAGInfo() const override {
return &TSInfo;
}
virtual const TargetRegisterInfo *getRegisterInfo() const {
const TargetRegisterInfo *getRegisterInfo() const override {
return &InstrInfo.getRegisterInfo();
}
virtual const DataLayout *getDataLayout() const { return &DL; }
const DataLayout *getDataLayout() const override { return &DL; }
// Pass Pipeline Configuration
virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
virtual void addAnalysisPasses(PassManagerBase &PM);
void addAnalysisPasses(PassManagerBase &PM) override;
};
} // end namespace llvm

2
lib/Target/XCore/XCoreTargetObjectFile.h
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@ -22,7 +22,7 @@ static const unsigned CodeModelLargeSize = 256;
const MCSection *ReadOnlySectionLarge;
const MCSection *DataRelROSectionLarge;
public:
void Initialize(MCContext &Ctx, const TargetMachine &TM);
void Initialize(MCContext &Ctx, const TargetMachine &TM) override;
const MCSection *
getExplicitSectionGlobal(const GlobalValue *GV,