From d474181920f0335c4fe4154e3e50df6d6ba50587 Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Tue, 6 May 2014 20:23:04 +0000 Subject: [PATCH] ArrayRef-ize the Feature and Processor tables for SubtargetFeatures. This removes arguments passed everywhere and allows the use of standard iteration over lists. Should be no functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208127 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/MC/MCSubtargetInfo.h | 13 ++-- include/llvm/MC/SubtargetFeature.h | 11 ++- lib/MC/MCSubtargetInfo.cpp | 17 ++--- lib/MC/SubtargetFeature.cpp | 106 ++++++++++++---------------- utils/TableGen/SubtargetEmitter.cpp | 24 +++---- 5 files changed, 73 insertions(+), 98 deletions(-) diff --git a/include/llvm/MC/MCSubtargetInfo.h b/include/llvm/MC/MCSubtargetInfo.h index 01e8236482f..088c5e7470d 100644 --- a/include/llvm/MC/MCSubtargetInfo.h +++ b/include/llvm/MC/MCSubtargetInfo.h @@ -28,8 +28,8 @@ class StringRef; /// class MCSubtargetInfo { std::string TargetTriple; // Target triple - const SubtargetFeatureKV *ProcFeatures; // Processor feature list - const SubtargetFeatureKV *ProcDesc; // Processor descriptions + ArrayRef ProcFeatures; // Processor feature list + ArrayRef ProcDesc; // Processor descriptions // Scheduler machine model const SubtargetInfoKV *ProcSchedModels; @@ -41,21 +41,18 @@ class MCSubtargetInfo { const InstrStage *Stages; // Instruction itinerary stages const unsigned *OperandCycles; // Itinerary operand cycles const unsigned *ForwardingPaths; // Forwarding paths - unsigned NumFeatures; // Number of processor features - unsigned NumProcs; // Number of processors uint64_t FeatureBits; // Feature bits for current CPU + FS public: void InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS, - const SubtargetFeatureKV *PF, - const SubtargetFeatureKV *PD, + ArrayRef PF, + ArrayRef PD, const SubtargetInfoKV *ProcSched, const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, const InstrStage *IS, - const unsigned *OC, const unsigned *FP, - unsigned NF, unsigned NP); + const unsigned *OC, const unsigned *FP); /// getTargetTriple - Return the target triple string. StringRef getTargetTriple() const { diff --git a/include/llvm/MC/SubtargetFeature.h b/include/llvm/MC/SubtargetFeature.h index d9bea4b917b..c5d62a6cbae 100644 --- a/include/llvm/MC/SubtargetFeature.h +++ b/include/llvm/MC/SubtargetFeature.h @@ -18,9 +18,9 @@ #ifndef LLVM_MC_SUBTARGETFEATURE_H #define LLVM_MC_SUBTARGETFEATURE_H +#include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/Triple.h" #include "llvm/Support/DataTypes.h" -#include namespace llvm { class raw_ostream; @@ -83,15 +83,12 @@ public: /// ToggleFeature - Toggle a feature and returns the newly updated feature /// bits. uint64_t ToggleFeature(uint64_t Bits, const StringRef String, - const SubtargetFeatureKV *FeatureTable, - size_t FeatureTableSize); + ArrayRef FeatureTable); /// Get feature bits of a CPU. uint64_t getFeatureBits(const StringRef CPU, - const SubtargetFeatureKV *CPUTable, - size_t CPUTableSize, - const SubtargetFeatureKV *FeatureTable, - size_t FeatureTableSize); + ArrayRef CPUTable, + ArrayRef FeatureTable); /// Print feature string. void print(raw_ostream &OS) const; diff --git a/lib/MC/MCSubtargetInfo.cpp b/lib/MC/MCSubtargetInfo.cpp index 8d8e2900b67..4424c91eaa7 100644 --- a/lib/MC/MCSubtargetInfo.cpp +++ b/lib/MC/MCSubtargetInfo.cpp @@ -24,9 +24,7 @@ MCSchedModel MCSchedModel::DefaultSchedModel; // For unknown processors. void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) { SubtargetFeatures Features(FS); - FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs, - ProcFeatures, NumFeatures); - + FeatureBits = Features.getFeatureBits(CPU, ProcDesc, ProcFeatures); InitCPUSchedModel(CPU); } @@ -40,16 +38,15 @@ MCSubtargetInfo::InitCPUSchedModel(StringRef CPU) { void MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS, - const SubtargetFeatureKV *PF, - const SubtargetFeatureKV *PD, + ArrayRef PF, + ArrayRef PD, const SubtargetInfoKV *ProcSched, const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, const InstrStage *IS, const unsigned *OC, - const unsigned *FP, - unsigned NF, unsigned NP) { + const unsigned *FP) { TargetTriple = TT; ProcFeatures = PF; ProcDesc = PD; @@ -61,8 +58,6 @@ MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS, Stages = IS; OperandCycles = OC; ForwardingPaths = FP; - NumFeatures = NF; - NumProcs = NP; InitMCProcessorInfo(CPU, FS); } @@ -78,8 +73,7 @@ uint64_t MCSubtargetInfo::ToggleFeature(uint64_t FB) { /// bits. This version will also change all implied bits. uint64_t MCSubtargetInfo::ToggleFeature(StringRef FS) { SubtargetFeatures Features; - FeatureBits = Features.ToggleFeature(FeatureBits, FS, - ProcFeatures, NumFeatures); + FeatureBits = Features.ToggleFeature(FeatureBits, FS, ProcFeatures); return FeatureBits; } @@ -88,6 +82,7 @@ const MCSchedModel * MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const { assert(ProcSchedModels && "Processor machine model not available!"); + unsigned NumProcs = ProcDesc.size(); #ifndef NDEBUG for (size_t i = 1; i < NumProcs; i++) { assert(strcmp(ProcSchedModels[i - 1].Key, ProcSchedModels[i].Key) < 0 && diff --git a/lib/MC/SubtargetFeature.cpp b/lib/MC/SubtargetFeature.cpp index 8383a181a90..f2d12afa980 100644 --- a/lib/MC/SubtargetFeature.cpp +++ b/lib/MC/SubtargetFeature.cpp @@ -105,49 +105,43 @@ void SubtargetFeatures::AddFeature(const StringRef String) { } /// Find KV in array using binary search. -static const SubtargetFeatureKV *Find(StringRef S, const SubtargetFeatureKV *A, - size_t L) { - // Determine the end of the array - const SubtargetFeatureKV *Hi = A + L; +static const SubtargetFeatureKV *Find(StringRef S, + ArrayRef A) { // Binary search the array - const SubtargetFeatureKV *F = std::lower_bound(A, Hi, S); + auto F = std::lower_bound(A.begin(), A.end(), S); // If not found then return NULL - if (F == Hi || StringRef(F->Key) != S) return nullptr; + if (F == A.end() || StringRef(F->Key) != S) return nullptr; // Return the found array item return F; } /// getLongestEntryLength - Return the length of the longest entry in the table. /// -static size_t getLongestEntryLength(const SubtargetFeatureKV *Table, - size_t Size) { +static size_t getLongestEntryLength(ArrayRef Table) { size_t MaxLen = 0; - for (size_t i = 0; i < Size; i++) - MaxLen = std::max(MaxLen, std::strlen(Table[i].Key)); + for (auto &I : Table) + MaxLen = std::max(MaxLen, std::strlen(I.Key)); return MaxLen; } /// Display help for feature choices. /// -static void Help(const SubtargetFeatureKV *CPUTable, size_t CPUTableSize, - const SubtargetFeatureKV *FeatTable, - size_t FeatTableSize) { +static void Help(ArrayRef CPUTable, + ArrayRef FeatTable) { // Determine the length of the longest CPU and Feature entries. - unsigned MaxCPULen = getLongestEntryLength(CPUTable, CPUTableSize); - unsigned MaxFeatLen = getLongestEntryLength(FeatTable, FeatTableSize); + unsigned MaxCPULen = getLongestEntryLength(CPUTable); + unsigned MaxFeatLen = getLongestEntryLength(FeatTable); // Print the CPU table. errs() << "Available CPUs for this target:\n\n"; - for (size_t i = 0; i != CPUTableSize; i++) - errs() << format(" %-*s - %s.\n", - MaxCPULen, CPUTable[i].Key, CPUTable[i].Desc); + for (auto &CPU : CPUTable) + errs() << format(" %-*s - %s.\n", MaxCPULen, CPU.Key, CPU.Desc); errs() << '\n'; // Print the Feature table. errs() << "Available features for this target:\n\n"; - for (size_t i = 0; i != FeatTableSize; i++) - errs() << format(" %-*s - %s.\n", - MaxFeatLen, FeatTable[i].Key, FeatTable[i].Desc); + for (auto &Feature : FeatTable) + errs() << format(" %-*s - %s.\n", MaxFeatLen, Feature.Key, Feature.Desc); errs() << '\n'; errs() << "Use +feature to enable a feature, or -feature to disable it.\n" @@ -173,16 +167,13 @@ std::string SubtargetFeatures::getString() const { /// static void SetImpliedBits(uint64_t &Bits, const SubtargetFeatureKV *FeatureEntry, - const SubtargetFeatureKV *FeatureTable, - size_t FeatureTableSize) { - for (size_t i = 0; i < FeatureTableSize; ++i) { - const SubtargetFeatureKV &FE = FeatureTable[i]; - + ArrayRef FeatureTable) { + for (auto &FE : FeatureTable) { if (FeatureEntry->Value == FE.Value) continue; if (FeatureEntry->Implies & FE.Value) { Bits |= FE.Value; - SetImpliedBits(Bits, &FE, FeatureTable, FeatureTableSize); + SetImpliedBits(Bits, &FE, FeatureTable); } } } @@ -192,41 +183,38 @@ void SetImpliedBits(uint64_t &Bits, const SubtargetFeatureKV *FeatureEntry, /// static void ClearImpliedBits(uint64_t &Bits, const SubtargetFeatureKV *FeatureEntry, - const SubtargetFeatureKV *FeatureTable, - size_t FeatureTableSize) { - for (size_t i = 0; i < FeatureTableSize; ++i) { - const SubtargetFeatureKV &FE = FeatureTable[i]; - + ArrayRef FeatureTable) { + for (auto &FE : FeatureTable) { if (FeatureEntry->Value == FE.Value) continue; if (FE.Implies & FeatureEntry->Value) { Bits &= ~FE.Value; - ClearImpliedBits(Bits, &FE, FeatureTable, FeatureTableSize); + ClearImpliedBits(Bits, &FE, FeatureTable); } } } /// ToggleFeature - Toggle a feature and returns the newly updated feature /// bits. -uint64_t -SubtargetFeatures::ToggleFeature(uint64_t Bits, const StringRef Feature, - const SubtargetFeatureKV *FeatureTable, - size_t FeatureTableSize) { +uint64_t SubtargetFeatures::ToggleFeature( + uint64_t Bits, const StringRef Feature, + ArrayRef FeatureTable) { + // Find feature in table. const SubtargetFeatureKV *FeatureEntry = - Find(StripFlag(Feature), FeatureTable, FeatureTableSize); + Find(StripFlag(Feature), FeatureTable); // If there is a match if (FeatureEntry) { if ((Bits & FeatureEntry->Value) == FeatureEntry->Value) { Bits &= ~FeatureEntry->Value; // For each feature that implies this, clear it. - ClearImpliedBits(Bits, FeatureEntry, FeatureTable, FeatureTableSize); + ClearImpliedBits(Bits, FeatureEntry, FeatureTable); } else { Bits |= FeatureEntry->Value; // For each feature that this implies, set it. - SetImpliedBits(Bits, FeatureEntry, FeatureTable, FeatureTableSize); + SetImpliedBits(Bits, FeatureEntry, FeatureTable); } } else { errs() << "'" << Feature @@ -240,20 +228,20 @@ SubtargetFeatures::ToggleFeature(uint64_t Bits, const StringRef Feature, /// getFeatureBits - Get feature bits a CPU. /// -uint64_t SubtargetFeatures::getFeatureBits(const StringRef CPU, - const SubtargetFeatureKV *CPUTable, - size_t CPUTableSize, - const SubtargetFeatureKV *FeatureTable, - size_t FeatureTableSize) { - if (!FeatureTableSize || !CPUTableSize) +uint64_t +SubtargetFeatures::getFeatureBits(const StringRef CPU, + ArrayRef CPUTable, + ArrayRef FeatureTable) { + + if (CPUTable.empty() || FeatureTable.empty()) return 0; #ifndef NDEBUG - for (size_t i = 1; i < CPUTableSize; i++) { + for (size_t i = 1, e = CPUTable.size(); i != e; ++i) { assert(strcmp(CPUTable[i - 1].Key, CPUTable[i].Key) < 0 && "CPU table is not sorted"); } - for (size_t i = 1; i < FeatureTableSize; i++) { + for (size_t i = 1, e = FeatureTable.size(); i != e; ++i) { assert(strcmp(FeatureTable[i - 1].Key, FeatureTable[i].Key) < 0 && "CPU features table is not sorted"); } @@ -262,21 +250,21 @@ uint64_t SubtargetFeatures::getFeatureBits(const StringRef CPU, // Check if help is needed if (CPU == "help") - Help(CPUTable, CPUTableSize, FeatureTable, FeatureTableSize); + Help(CPUTable, FeatureTable); // Find CPU entry if CPU name is specified. else if (!CPU.empty()) { - const SubtargetFeatureKV *CPUEntry = Find(CPU, CPUTable, CPUTableSize); + const SubtargetFeatureKV *CPUEntry = Find(CPU, CPUTable); + // If there is a match if (CPUEntry) { // Set base feature bits Bits = CPUEntry->Value; // Set the feature implied by this CPU feature, if any. - for (size_t i = 0; i < FeatureTableSize; ++i) { - const SubtargetFeatureKV &FE = FeatureTable[i]; + for (auto &FE : FeatureTable) { if (CPUEntry->Value & FE.Value) - SetImpliedBits(Bits, &FE, FeatureTable, FeatureTableSize); + SetImpliedBits(Bits, &FE, FeatureTable); } } else { errs() << "'" << CPU @@ -286,16 +274,14 @@ uint64_t SubtargetFeatures::getFeatureBits(const StringRef CPU, } // Iterate through each feature - for (size_t i = 0, E = Features.size(); i < E; i++) { - const StringRef Feature = Features[i]; - + for (auto &Feature : Features) { // Check for help if (Feature == "+help") - Help(CPUTable, CPUTableSize, FeatureTable, FeatureTableSize); + Help(CPUTable, FeatureTable); // Find feature in table. const SubtargetFeatureKV *FeatureEntry = - Find(StripFlag(Feature), FeatureTable, FeatureTableSize); + Find(StripFlag(Feature), FeatureTable); // If there is a match if (FeatureEntry) { // Enable/disable feature in bits @@ -303,12 +289,12 @@ uint64_t SubtargetFeatures::getFeatureBits(const StringRef CPU, Bits |= FeatureEntry->Value; // For each feature that this implies, set it. - SetImpliedBits(Bits, FeatureEntry, FeatureTable, FeatureTableSize); + SetImpliedBits(Bits, FeatureEntry, FeatureTable); } else { Bits &= ~FeatureEntry->Value; // For each feature that implies this, clear it. - ClearImpliedBits(Bits, FeatureEntry, FeatureTable, FeatureTableSize); + ClearImpliedBits(Bits, FeatureEntry, FeatureTable); } } else { errs() << "'" << Feature diff --git a/utils/TableGen/SubtargetEmitter.cpp b/utils/TableGen/SubtargetEmitter.cpp index 846a485959c..49c0bacb321 100644 --- a/utils/TableGen/SubtargetEmitter.cpp +++ b/utils/TableGen/SubtargetEmitter.cpp @@ -1454,11 +1454,11 @@ void SubtargetEmitter::run(raw_ostream &OS) { if (NumFeatures) OS << Target << "FeatureKV, "; else - OS << "0, "; + OS << "None, "; if (NumProcs) OS << Target << "SubTypeKV, "; else - OS << "0, "; + OS << "None, "; OS << '\n'; OS.indent(22); OS << Target << "ProcSchedKV, " << Target << "WriteProcResTable, " @@ -1468,10 +1468,10 @@ void SubtargetEmitter::run(raw_ostream &OS) { OS << '\n'; OS.indent(22); OS << Target << "Stages, " << Target << "OperandCycles, " - << Target << "ForwardingPaths, "; + << Target << "ForwardingPaths"; } else - OS << "0, 0, 0, "; - OS << NumFeatures << ", " << NumProcs << ");\n}\n\n"; + OS << "0, 0, 0"; + OS << ");\n}\n\n"; OS << "} // End llvm namespace \n"; @@ -1532,13 +1532,13 @@ void SubtargetEmitter::run(raw_ostream &OS) { << " : TargetSubtargetInfo() {\n" << " InitMCSubtargetInfo(TT, CPU, FS, "; if (NumFeatures) - OS << Target << "FeatureKV, "; + OS << "makeArrayRef(" << Target << "FeatureKV, " << NumFeatures << "), "; else - OS << "0, "; + OS << "None, "; if (NumProcs) - OS << Target << "SubTypeKV, "; + OS << "makeArrayRef(" << Target << "SubTypeKV, " << NumProcs << "), "; else - OS << "0, "; + OS << "None, "; OS << '\n'; OS.indent(22); OS << Target << "ProcSchedKV, " << Target << "WriteProcResTable, " @@ -1548,10 +1548,10 @@ void SubtargetEmitter::run(raw_ostream &OS) { if (SchedModels.hasItineraries()) { OS << Target << "Stages, " << Target << "OperandCycles, " - << Target << "ForwardingPaths, "; + << Target << "ForwardingPaths"; } else - OS << "0, 0, 0, "; - OS << NumFeatures << ", " << NumProcs << ");\n}\n\n"; + OS << "0, 0, 0"; + OS << ");\n}\n\n"; EmitSchedModelHelpers(ClassName, OS);