6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-13 04:30:23 +00:00
Code Issues Projects Releases Wiki Activity

[SystemZ] Add negative integer absolute (load negative)

Browse Source 
For now this matches the equivalent of (neg (abs ...)), which did hit a few
times in projects/test-suite.  We should probably also match cases where
absolute-like selects are used with reversed arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188671 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Richard Sandiford 2013-08-19 12:56:58 +00:00
parent b0d40a22e5
commit d4a37e6137
6 changed files with 169 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
lib/Target/SystemZ/README.txt
View File

@ -104,12 +104,6 @@ such as ICM and STCM.
--
DAGCombiner can detect integer absolute, but there's not yet an associated
ISD opcode. We could add one and implement it using LOAD POSITIVE.
Negated absolutes could use LOAD NEGATIVE.
--
DAGCombiner doesn't yet fold truncations of extended loads. Functions like:
unsigned long f (unsigned long x, unsigned short *y)

10
lib/Target/SystemZ/SystemZInstrInfo.td
View File

@ -547,6 +547,16 @@ let Defs = [CC] in {
}
defm : SXU<z_iabs64, LPGFR>;
let Defs = [CC] in {
let CCValues = 0xF, CompareZeroCCMask = 0x8 in {
def LNR : UnaryRR <"ln", 0x11, z_inegabs32, GR32, GR32>;
def LNGR : UnaryRRE<"lng", 0xB901, z_inegabs64, GR64, GR64>;
}
let CCValues = 0xE, CompareZeroCCMask = 0xE in
def LNGFR : UnaryRRE<"lngf", 0xB911, null_frag, GR64, GR32>;
}
defm : SXU<z_inegabs64, LNGFR>;
let Defs = [CC] in {
let CCValues = 0xF, CompareZeroCCMask = 0x8 in {
def LCR : UnaryRR <"lc", 0x13, ineg, GR32, GR32>;

2
lib/Target/SystemZ/SystemZOperators.td
View File

@ -247,6 +247,8 @@ def z_iabs32 : PatFrag<(ops node:$src),
def z_iabs64 : PatFrag<(ops node:$src),
(xor (add node:$src, (sra node:$src, (i32 63))),
(sra node:$src, (i32 63)))>;
def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>;
def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>;
// Fused multiply-add and multiply-subtract, but with the order of the
// operands matching SystemZ's MA and MS instructions.

91
test/CodeGen/SystemZ/int-neg-02.ll Normal file
View File

@ -0,0 +1,91 @@
; Test negative integer absolute.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; Test i32->i32 negative absolute using slt.
define i32 @f1(i32 %val) {
; CHECK-LABEL: f1:
; CHECK: lnr %r2, %r2
; CHECK: br %r14
%cmp = icmp slt i32 %val, 0
%neg = sub i32 0, %val
%abs = select i1 %cmp, i32 %neg, i32 %val
%res = sub i32 0, %abs
ret i32 %res
}
; Test i32->i32 negative absolute using sle.
define i32 @f2(i32 %val) {
; CHECK-LABEL: f2:
; CHECK: lnr %r2, %r2
; CHECK: br %r14
%cmp = icmp sle i32 %val, 0
%neg = sub i32 0, %val
%abs = select i1 %cmp, i32 %neg, i32 %val
%res = sub i32 0, %abs
ret i32 %res
}
; Test i32->i32 negative absolute using sgt.
define i32 @f3(i32 %val) {
; CHECK-LABEL: f3:
; CHECK: lnr %r2, %r2
; CHECK: br %r14
%cmp = icmp sgt i32 %val, 0
%neg = sub i32 0, %val
%abs = select i1 %cmp, i32 %val, i32 %neg
%res = sub i32 0, %abs
ret i32 %res
}
; Test i32->i32 negative absolute using sge.
define i32 @f4(i32 %val) {
; CHECK-LABEL: f4:
; CHECK: lnr %r2, %r2
; CHECK: br %r14
%cmp = icmp sge i32 %val, 0
%neg = sub i32 0, %val
%abs = select i1 %cmp, i32 %val, i32 %neg
%res = sub i32 0, %abs
ret i32 %res
}
; Test i32->i64 negative absolute.
define i64 @f5(i32 %val) {
; CHECK-LABEL: f5:
; CHECK: lngfr %r2, %r2
; CHECK: br %r14
%ext = sext i32 %val to i64
%cmp = icmp slt i64 %ext, 0
%neg = sub i64 0, %ext
%abs = select i1 %cmp, i64 %neg, i64 %ext
%res = sub i64 0, %abs
ret i64 %res
}
; Test i32->i64 negative absolute that uses an "in-register" form of
; sign extension.
define i64 @f6(i64 %val) {
; CHECK-LABEL: f6:
; CHECK: lngfr %r2, %r2
; CHECK: br %r14
%trunc = trunc i64 %val to i32
%ext = sext i32 %trunc to i64
%cmp = icmp slt i64 %ext, 0
%neg = sub i64 0, %ext
%abs = select i1 %cmp, i64 %neg, i64 %ext
%res = sub i64 0, %abs
ret i64 %res
}
; Test i64 negative absolute.
define i64 @f7(i64 %val) {
; CHECK-LABEL: f7:
; CHECK: lngr %r2, %r2
; CHECK: br %r14
%cmp = icmp slt i64 %val, 0
%neg = sub i64 0, %val
%abs = select i1 %cmp, i64 %neg, i64 %val
%res = sub i64 0, %abs
ret i64 %res
}

36
test/MC/Disassembler/SystemZ/insns.txt
View File

@ -3307,6 +3307,42 @@
# CHECK: lnebr %f15, %f9
0xb3 0x01 0x00 0xf9
# CHECK: lngfr %r0, %r0
0xb9 0x11 0x00 0x00
# CHECK: lngfr %r0, %r15
0xb9 0x11 0x00 0x0f
# CHECK: lngfr %r15, %r0
0xb9 0x11 0x00 0xf0
# CHECK: lngfr %r7, %r8
0xb9 0x11 0x00 0x78
# CHECK: lngr %r0, %r0
0xb9 0x01 0x00 0x00
# CHECK: lngr %r0, %r15
0xb9 0x01 0x00 0x0f
# CHECK: lngr %r15, %r0
0xb9 0x01 0x00 0xf0
# CHECK: lngr %r7, %r8
0xb9 0x01 0x00 0x78
# CHECK: lnr %r0, %r0
0x11 0x00
# CHECK: lnr %r0, %r15
0x11 0x0f
# CHECK: lnr %r15, %r0
0x11 0xf0
# CHECK: lnr %r7, %r8
0x11 0x78
# CHECK: lnxbr %f0, %f8
0xb3 0x41 0x00 0x08

30
test/MC/SystemZ/insn-good.s
View File

@ -4727,6 +4727,36 @@
lnebr %f15,%f0
lnebr %f15,%f9
#CHECK: lngfr %r0, %r0 # encoding: [0xb9,0x11,0x00,0x00]
#CHECK: lngfr %r0, %r15 # encoding: [0xb9,0x11,0x00,0x0f]
#CHECK: lngfr %r15, %r0 # encoding: [0xb9,0x11,0x00,0xf0]
#CHECK: lngfr %r7, %r8 # encoding: [0xb9,0x11,0x00,0x78]
lngfr %r0,%r0
lngfr %r0,%r15
lngfr %r15,%r0
lngfr %r7,%r8
#CHECK: lngr %r0, %r0 # encoding: [0xb9,0x01,0x00,0x00]
#CHECK: lngr %r0, %r15 # encoding: [0xb9,0x01,0x00,0x0f]
#CHECK: lngr %r15, %r0 # encoding: [0xb9,0x01,0x00,0xf0]
#CHECK: lngr %r7, %r8 # encoding: [0xb9,0x01,0x00,0x78]
lngr %r0,%r0
lngr %r0,%r15
lngr %r15,%r0
lngr %r7,%r8
#CHECK: lnr %r0, %r0 # encoding: [0x11,0x00]
#CHECK: lnr %r0, %r15 # encoding: [0x11,0x0f]
#CHECK: lnr %r15, %r0 # encoding: [0x11,0xf0]
#CHECK: lnr %r7, %r8 # encoding: [0x11,0x78]
lnr %r0,%r0
lnr %r0,%r15
lnr %r15,%r0
lnr %r7,%r8
#CHECK: lnxbr %f0, %f8 # encoding: [0xb3,0x41,0x00,0x08]
#CHECK: lnxbr %f0, %f13 # encoding: [0xb3,0x41,0x00,0x0d]
#CHECK: lnxbr %f13, %f0 # encoding: [0xb3,0x41,0x00,0xd0]