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"on the rare occasion the SPU BE produces illegal assembly - it tries to emit an add instruction of the form 'a reg, reg, imm'."
Patch by Kalle Raiskila! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103021 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -941,13 +941,21 @@ SPUDAGToDAGISel::Select(SDNode *N) {
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&& ((RN = dyn_cast<RegisterSDNode>(Op0.getNode())) != 0
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&& RN->getReg() != SPU::R1))) {
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NewOpc = SPU::Ar32;
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Ops[1] = Op1;
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if (Op1.getOpcode() == ISD::Constant) {
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ConstantSDNode *CN = cast<ConstantSDNode>(Op1);
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Op1 = CurDAG->getTargetConstant(CN->getSExtValue(), VT);
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NewOpc = (isI32IntS10Immediate(CN) ? SPU::AIr32 : SPU::Ar32);
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if (isInt<10>(CN->getSExtValue())) {
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NewOpc = SPU::AIr32;
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Ops[1] = Op1;
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} else {
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Ops[1] = SDValue(CurDAG->getMachineNode(SPU::ILr32, dl,
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N->getValueType(0),
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Op1),
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0);
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}
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}
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Ops[0] = Op0;
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Ops[1] = Op1;
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n_ops = 2;
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}
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}
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13
test/CodeGen/CellSPU/storestruct.ll
Normal file
13
test/CodeGen/CellSPU/storestruct.ll
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@ -0,0 +1,13 @@
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; RUN: llc < %s -march=cellspu | FileCheck %s
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%0 = type {i32, i32}
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@buffer = global [ 72 x %0 ] zeroinitializer
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define void@test( ) {
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; Check that there is no illegal "a rt, ra, imm" instruction
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; CHECK-NOT: a {{\$., \$., 5..}}
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; CHECK: a {{\$., \$., \$.}}
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store %0 {i32 1, i32 2} ,
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%0* getelementptr ([72 x %0]* @buffer, i32 0, i32 71)
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ret void
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}
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