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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19455 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-01-11 04:31:30 +00:00
parent 492c2935be
commit d4dab929d8
1 changed files with 14 additions and 1 deletions
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13
lib/Target/X86/X86ISelPattern.cpp
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@ -1382,9 +1382,22 @@ unsigned ISel::SelectExpr(SDOperand N) {
case ISD::XOR: case ISD::XOR:
if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N.getOperand(1))) { if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
Tmp1 = SelectExpr(N.getOperand(0)); Tmp1 = SelectExpr(N.getOperand(0));
if (CN->isAllOnesValue()) {
switch (N.getValueType()) { switch (N.getValueType()) {
default: assert(0 && "Cannot add this type!"); default: assert(0 && "Cannot add this type!");
case MVT::i1: case MVT::i1:
case MVT::i8: Opc = X86::NOT8r; break;
case MVT::i16: Opc = X86::NOT16r; break;
case MVT::i32: Opc = X86::NOT32r; break;
}
BuildMI(BB, Opc, 1, Result).addReg(Tmp1);
return Result;
}
switch (N.getValueType()) {
default: assert(0 && "Cannot xor this type!");
case MVT::i1:
case MVT::i8: Opc = X86::XOR8ri; break; case MVT::i8: Opc = X86::XOR8ri; break;
case MVT::i16: Opc = X86::XOR16ri; break; case MVT::i16: Opc = X86::XOR16ri; break;
case MVT::i32: Opc = X86::XOR32ri; break; case MVT::i32: Opc = X86::XOR32ri; break;