From d525214b96a9ae361f5dd5b03956b9335f14ff66 Mon Sep 17 00:00:00 2001 From: Chad Rosier Date: Thu, 21 May 2015 21:59:57 +0000 Subject: [PATCH] Use new MachineInstr mayLoadOrStore() API. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237965 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AArch64/AArch64A53Fix835769.cpp | 2 +- lib/Target/AArch64/AArch64InstrInfo.cpp | 6 ++---- 2 files changed, 3 insertions(+), 5 deletions(-) diff --git a/lib/Target/AArch64/AArch64A53Fix835769.cpp b/lib/Target/AArch64/AArch64A53Fix835769.cpp index 3bc5a54b5ae..d7ef3f4ef65 100644 --- a/lib/Target/AArch64/AArch64A53Fix835769.cpp +++ b/lib/Target/AArch64/AArch64A53Fix835769.cpp @@ -48,7 +48,7 @@ static bool isFirstInstructionInSequence(MachineInstr *MI) { case AArch64::PRFUMi: return true; default: - return (MI->mayLoad() || MI->mayStore()); + return MI->mayLoadOrStore(); } } diff --git a/lib/Target/AArch64/AArch64InstrInfo.cpp b/lib/Target/AArch64/AArch64InstrInfo.cpp index 73636d2986b..207c34ca7f0 100644 --- a/lib/Target/AArch64/AArch64InstrInfo.cpp +++ b/lib/Target/AArch64/AArch64InstrInfo.cpp @@ -617,10 +617,8 @@ AArch64InstrInfo::areMemAccessesTriviallyDisjoint(MachineInstr *MIa, int OffsetA = 0, OffsetB = 0; int WidthA = 0, WidthB = 0; - assert(MIa && (MIa->mayLoad() || MIa->mayStore()) && - "MIa must be a store or a load"); - assert(MIb && (MIb->mayLoad() || MIb->mayStore()) && - "MIb must be a store or a load"); + assert(MIa && MIa->mayLoadOrStore() && "MIa must be a load or store."); + assert(MIb && MIb->mayLoadOrStore() && "MIb must be a load or store."); if (MIa->hasUnmodeledSideEffects() || MIb->hasUnmodeledSideEffects() || MIa->hasOrderedMemoryRef() || MIb->hasOrderedMemoryRef())