6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-21 18:29:45 +00:00
Code Issues Projects Releases Wiki Activity

[Hexagon] [NFC] Moving function implementations out of header. Clang-formatting files.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223245 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Colin LeMahieu 2014-12-03 17:35:39 +00:00
parent 0f87df2033
commit d54ac604b3
2 changed files with 88 additions and 79 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

57
lib/Target/Hexagon/MCTargetDesc/HexagonMCInst.cpp
View File

@ -18,13 +18,27 @@
using namespace llvm;
HexagonMCInst::HexagonMCInst()
: MCInst(), MCID(nullptr), packetBegin(0), packetEnd(0){};
HexagonMCInst::HexagonMCInst(MCInstrDesc const &mcid)
: MCInst(), MCID(&mcid), packetBegin(0), packetEnd(0){};
bool HexagonMCInst::isPacketBegin() const { return (packetBegin); };
bool HexagonMCInst::isPacketEnd() const { return (packetEnd); };
void HexagonMCInst::setPacketBegin(bool Y) { packetBegin = Y; };
void HexagonMCInst::setPacketEnd(bool Y) { packetEnd = Y; };
void HexagonMCInst::resetPacket() {
setPacketBegin(false);
setPacketEnd(false);
};
// Return the slots used by the insn.
unsigned HexagonMCInst::getUnits(const HexagonTargetMachine* TM) const {
unsigned HexagonMCInst::getUnits(const HexagonTargetMachine *TM) const {
const HexagonInstrInfo *QII = TM->getSubtargetImpl()->getInstrInfo();
const InstrItineraryData *II =
TM->getSubtargetImpl()->getInstrItineraryData();
const InstrStage*
IS = II->beginStage(QII->get(this->getOpcode()).getSchedClass());
const InstrStage *IS =
II->beginStage(QII->get(this->getOpcode()).getSchedClass());
return (IS->getUnits());
}
@ -38,8 +52,7 @@ unsigned HexagonMCInst::getType() const {
// Return whether the insn is an actual insn.
bool HexagonMCInst::isCanon() const {
return (!MCID->isPseudo() &&
!isPrefix() &&
return (!MCID->isPseudo() && !isPrefix() &&
getType() != HexagonII::TypeENDLOOP);
}
@ -67,13 +80,13 @@ bool HexagonMCInst::hasNewValue() const {
}
// Return the operand that consumes or produces a new value.
const MCOperand& HexagonMCInst::getNewValue() const {
const MCOperand &HexagonMCInst::getNewValue() const {
const uint64_t F = MCID->TSFlags;
const unsigned O = (F >> HexagonII::NewValueOpPos) &
HexagonII::NewValueOpMask;
const MCOperand& MCO = getOperand(O);
const unsigned O =
(F >> HexagonII::NewValueOpPos) & HexagonII::NewValueOpMask;
const MCOperand &MCO = getOperand(O);
assert ((isNewValue() || hasNewValue()) && MCO.isReg());
assert((isNewValue() || hasNewValue()) && MCO.isReg());
return (MCO);
}
@ -93,9 +106,9 @@ bool HexagonMCInst::isConstExtended(void) const {
return false;
short ExtOpNum = getCExtOpNum();
int MinValue = getMinValue();
int MaxValue = getMaxValue();
const MCOperand& MO = getOperand(ExtOpNum);
int MinValue = getMinValue();
int MaxValue = getMaxValue();
const MCOperand &MO = getOperand(ExtOpNum);
// We could be using an instruction with an extendable immediate and shoehorn
// a global address into it. If it is a global address it will be constant
@ -141,18 +154,17 @@ unsigned short HexagonMCInst::getCExtOpNum(void) const {
// Return whether the operand can be constant extended.
bool HexagonMCInst::isOperandExtended(const unsigned short OperandNum) const {
const uint64_t F = MCID->TSFlags;
return ((F >> HexagonII::ExtendableOpPos) & HexagonII::ExtendableOpMask)
== OperandNum;
return ((F >> HexagonII::ExtendableOpPos) & HexagonII::ExtendableOpMask) ==
OperandNum;
}
// Return the min value that a constant extendable operand can have
// without being extended.
int HexagonMCInst::getMinValue(void) const {
const uint64_t F = MCID->TSFlags;
unsigned isSigned = (F >> HexagonII::ExtentSignedPos)
& HexagonII::ExtentSignedMask;
unsigned bits = (F >> HexagonII::ExtentBitsPos)
& HexagonII::ExtentBitsMask;
unsigned isSigned =
(F >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask;
unsigned bits = (F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask;
if (isSigned) // if value is signed
return -1U << (bits - 1);
@ -164,10 +176,9 @@ int HexagonMCInst::getMinValue(void) const {
// without being extended.
int HexagonMCInst::getMaxValue(void) const {
const uint64_t F = MCID->TSFlags;
unsigned isSigned = (F >> HexagonII::ExtentSignedPos)
& HexagonII::ExtentSignedMask;
unsigned bits = (F >> HexagonII::ExtentBitsPos)
& HexagonII::ExtentBitsMask;
unsigned isSigned =
(F >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask;
unsigned bits = (F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask;
if (isSigned) // if value is signed
return ~(-1U << (bits - 1));

110
lib/Target/Hexagon/MCTargetDesc/HexagonMCInst.h
View File

@ -18,83 +18,81 @@
#include "llvm/MC/MCInst.h"
namespace llvm {
class MCOperand;
class MCOperand;
class HexagonMCInst: public MCInst {
// MCID is set during instruction lowering.
// It is needed in order to access TSFlags for
// use in checking MC instruction properties.
const MCInstrDesc *MCID;
class HexagonMCInst : public MCInst {
// MCID is set during instruction lowering.
// It is needed in order to access TSFlags for
// use in checking MC instruction properties.
const MCInstrDesc *MCID;
// Packet start and end markers
unsigned packetBegin: 1, packetEnd: 1;
// Packet start and end markers
unsigned packetBegin : 1, packetEnd : 1;
public:
explicit HexagonMCInst():
MCInst(), MCID(nullptr), packetBegin(0), packetEnd(0) {};
HexagonMCInst(const MCInstrDesc& mcid):
MCInst(), MCID(&mcid), packetBegin(0), packetEnd(0) {};
public:
explicit HexagonMCInst();
HexagonMCInst(const MCInstrDesc &mcid);
bool isPacketBegin() const { return (packetBegin); };
bool isPacketEnd() const { return (packetEnd); };
void setPacketBegin(bool Y) { packetBegin = Y; };
void setPacketEnd(bool Y) { packetEnd = Y; };
void resetPacket() { setPacketBegin(false); setPacketEnd(false); };
bool isPacketBegin() const;
bool isPacketEnd() const;
void setPacketBegin(bool Y);
void setPacketEnd(bool Y);
void resetPacket();
// Return the slots used by the insn.
unsigned getUnits(const HexagonTargetMachine* TM) const;
// Return the slots used by the insn.
unsigned getUnits(const HexagonTargetMachine *TM) const;
// Return the Hexagon ISA class for the insn.
unsigned getType() const;
// Return the Hexagon ISA class for the insn.
unsigned getType() const;
void setDesc(const MCInstrDesc& mcid) { MCID = &mcid; };
const MCInstrDesc& getDesc(void) const { return *MCID; };
void setDesc(const MCInstrDesc &mcid) { MCID = &mcid; };
const MCInstrDesc &getDesc(void) const { return *MCID; };
// Return whether the insn is an actual insn.
bool isCanon() const;
// Return whether the insn is an actual insn.
bool isCanon() const;
// Return whether the insn is a prefix.
bool isPrefix() const;
// Return whether the insn is a prefix.
bool isPrefix() const;
// Return whether the insn is solo, i.e., cannot be in a packet.
bool isSolo() const;
// Return whether the insn is solo, i.e., cannot be in a packet.
bool isSolo() const;
// Return whether the instruction needs to be constant extended.
bool isConstExtended() const;
// Return whether the instruction needs to be constant extended.
bool isConstExtended() const;
// Return constant extended operand number.
unsigned short getCExtOpNum(void) const;
// Return constant extended operand number.
unsigned short getCExtOpNum(void) const;
// Return whether the insn is a new-value consumer.
bool isNewValue() const;
// Return whether the insn is a new-value consumer.
bool isNewValue() const;
// Return whether the instruction is a legal new-value producer.
bool hasNewValue() const;
// Return whether the instruction is a legal new-value producer.
bool hasNewValue() const;
// Return the operand that consumes or produces a new value.
const MCOperand& getNewValue() const;
// Return the operand that consumes or produces a new value.
const MCOperand &getNewValue() const;
// Return number of bits in the constant extended operand.
unsigned getBitCount(void) const;
// Return number of bits in the constant extended operand.
unsigned getBitCount(void) const;
private:
// Return whether the instruction must be always extended.
bool isExtended() const;
private:
// Return whether the instruction must be always extended.
bool isExtended() const;
// Return true if the insn may be extended based on the operand value.
bool isExtendable() const;
// Return true if the insn may be extended based on the operand value.
bool isExtendable() const;
// Return true if the operand can be constant extended.
bool isOperandExtended(const unsigned short OperandNum) const;
// Return true if the operand can be constant extended.
bool isOperandExtended(const unsigned short OperandNum) const;
// Return the min value that a constant extendable operand can have
// without being extended.
int getMinValue() const;
// Return the min value that a constant extendable operand can have
// without being extended.
int getMinValue() const;
// Return the max value that a constant extendable operand can have
// without being extended.
int getMaxValue() const;
};
// Return the max value that a constant extendable operand can have
// without being extended.
int getMaxValue() const;
};
}
#endif