Arrange for FastISel code to have access to the MachineModuleInfo

object. This will be needed to support debug info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56508 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/CodeGen/FastISel.h

@@ -26,6 +26,7 @@ class MachineBasicBlock;
 class MachineConstantPool;
 class MachineFunction;
 class MachineFrameInfo;
+class MachineModuleInfo;
 class MachineRegisterInfo;
 class TargetData;
 class TargetInstrInfo;
@@ -44,6 +45,7 @@ protected:
   DenseMap<const BasicBlock *, MachineBasicBlock *> &MBBMap;
   DenseMap<const AllocaInst *, int> &StaticAllocaMap;
   MachineFunction &MF;
+  MachineModuleInfo *MMI;
   MachineRegisterInfo &MRI;
   MachineFrameInfo &MFI;
   MachineConstantPool &MCP;
@@ -94,6 +96,7 @@ public:
 
 protected:
   FastISel(MachineFunction &mf,
+           MachineModuleInfo *mmi,
            DenseMap<const Value *, unsigned> &vm,
            DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
            DenseMap<const AllocaInst *, int> &am);

include/llvm/CodeGen/SelectionDAGISel.h

@@ -28,6 +28,7 @@ namespace llvm {
   class MachineBasicBlock;
   class MachineFunction;
   class MachineInstr;
+  class MachineModuleInfo;
   class TargetLowering;
   class FunctionLoweringInfo;
   class HazardRecognizer;
@@ -106,7 +107,8 @@ protected:
                     int64_t DesiredMaskS) const;
   
 private:
-  void SelectAllBasicBlocks(Function &Fn, MachineFunction &MF);
+  void SelectAllBasicBlocks(Function &Fn, MachineFunction &MF,
+                            MachineModuleInfo *MMI);
   void FinishBasicBlock();
 
   void SelectBasicBlock(BasicBlock *LLVMBB,

include/llvm/Target/TargetLowering.h

@@ -40,6 +40,7 @@ namespace llvm {
   class MachineFunction;
   class MachineFrameInfo;
   class MachineInstr;
+  class MachineModuleInfo;
   class SDNode;
   class SDValue;
   class SelectionDAG;
@@ -1120,6 +1121,7 @@ public:
   /// or null if the target does not support "fast" ISel.
   virtual FastISel *
   createFastISel(MachineFunction &,
+                 MachineModuleInfo *,
                  DenseMap<const Value *, unsigned> &,
                  DenseMap<const BasicBlock *, MachineBasicBlock *> &,
                  DenseMap<const AllocaInst *, int> &) {

lib/CodeGen/SelectionDAG/FastISel.cpp

@@ -450,7 +450,7 @@ FastISel::SelectOperator(User *I, unsigned Opcode) {
     UpdateValueMap(I, Reg);
     return true;
   }
-  
+
   default:
     // Unhandled instruction. Halt "fast" selection and bail.
     return false;
@@ -458,6 +458,7 @@ FastISel::SelectOperator(User *I, unsigned Opcode) {
 }
 
 FastISel::FastISel(MachineFunction &mf,
+                   MachineModuleInfo *mmi,
                    DenseMap<const Value *, unsigned> &vm,
                    DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
                    DenseMap<const AllocaInst *, int> &am)
@@ -466,6 +467,7 @@ FastISel::FastISel(MachineFunction &mf,
     MBBMap(bm),
     StaticAllocaMap(am),
     MF(mf),
+    MMI(mmi),
     MRI(MF.getRegInfo()),
     MFI(*MF.getFrameInfo()),
     MCP(*MF.getConstantPool()),

lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

@@ -309,7 +309,8 @@ bool SelectionDAGISel::runOnFunction(Function &Fn) {
   DOUT << "\n\n\n=== " << Fn.getName() << "\n";
 
   FuncInfo->set(Fn, MF, EnableFastISel);
-  CurDAG->init(MF, getAnalysisToUpdate<MachineModuleInfo>());
+  MachineModuleInfo *MMI = getAnalysisToUpdate<MachineModuleInfo>();
+  CurDAG->init(MF, MMI);
   SDL->init(GFI, *AA);
 
   for (Function::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
@@ -317,7 +318,7 @@ bool SelectionDAGISel::runOnFunction(Function &Fn) {
       // Mark landing pad.
       FuncInfo->MBBMap[Invoke->getSuccessor(1)]->setIsLandingPad();
 
-  SelectAllBasicBlocks(Fn, MF);
+  SelectAllBasicBlocks(Fn, MF, MMI);
 
   // If the first basic block in the function has live ins that need to be
   // copied into vregs, emit the copies into the top of the block before
@@ -710,7 +711,8 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
   DEBUG(BB->dump());
 }  
 
-void SelectionDAGISel::SelectAllBasicBlocks(Function &Fn, MachineFunction &MF) {
+void SelectionDAGISel::SelectAllBasicBlocks(Function &Fn, MachineFunction &MF,
+                                            MachineModuleInfo *MMI) {
   for (Function::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
     BasicBlock *LLVMBB = &*I;
     BB = FuncInfo->MBBMap[LLVMBB];
@@ -726,7 +728,8 @@ void SelectionDAGISel::SelectAllBasicBlocks(Function &Fn, MachineFunction &MF) {
     // Before doing SelectionDAG ISel, see if FastISel has been requested.
     // FastISel doesn't support EH landing pads, which require special handling.
     if (EnableFastISel && !BB->isLandingPad()) {
-      if (FastISel *F = TLI.createFastISel(*FuncInfo->MF, FuncInfo->ValueMap,
+      if (FastISel *F = TLI.createFastISel(*FuncInfo->MF, MMI,
+                                           FuncInfo->ValueMap,
                                            FuncInfo->MBBMap,
                                            FuncInfo->StaticAllocaMap)) {
         // Emit code for any incoming arguments. This must happen before

lib/Target/X86/X86FastISel.cpp

@@ -49,10 +49,11 @@ class X86FastISel : public FastISel {
 
 public:
   explicit X86FastISel(MachineFunction &mf,
+                       MachineModuleInfo *mmi,
                        DenseMap<const Value *, unsigned> &vm,
                        DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
                        DenseMap<const AllocaInst *, int> &am)
-    : FastISel(mf, vm, bm, am) {
+    : FastISel(mf, mmi, vm, bm, am) {
     Subtarget = &TM.getSubtarget<X86Subtarget>();
     StackPtr = Subtarget->is64Bit() ? X86::RSP : X86::ESP;
     X86ScalarSSEf64 = Subtarget->hasSSE2();
@@ -1160,9 +1161,10 @@ unsigned X86FastISel::TargetMaterializeAlloca(AllocaInst *C) {
 
 namespace llvm {
   llvm::FastISel *X86::createFastISel(MachineFunction &mf,
+                        MachineModuleInfo *mmi,
                         DenseMap<const Value *, unsigned> &vm,
                         DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
                         DenseMap<const AllocaInst *, int> &am) {
-    return new X86FastISel(mf, vm, bm, am);
+    return new X86FastISel(mf, mmi, vm, bm, am);
   }
 }

lib/Target/X86/X86ISelLowering.cpp

@@ -1866,12 +1866,13 @@ bool X86TargetLowering::IsEligibleForTailCallOptimization(CallSDNode *TheCall,
 
 FastISel *
 X86TargetLowering::createFastISel(MachineFunction &mf,
+                                  MachineModuleInfo *mmo,
                                   DenseMap<const Value *, unsigned> &vm,
                                   DenseMap<const BasicBlock *,
                                            MachineBasicBlock *> &bm,
                                   DenseMap<const AllocaInst *, int> &am) {
                                          
-  return X86::createFastISel(mf, vm, bm, am);
+  return X86::createFastISel(mf, mmo, vm, bm, am);
 }
 
 

lib/Target/X86/X86ISelLowering.h

@@ -472,6 +472,7 @@ namespace llvm {
     /// or null if the target does not support "fast" ISel.
     virtual FastISel *
     createFastISel(MachineFunction &mf,
+                   MachineModuleInfo *mmi,
                    DenseMap<const Value *, unsigned> &,
                    DenseMap<const BasicBlock *, MachineBasicBlock *> &,
                    DenseMap<const AllocaInst *, int> &);
@@ -604,6 +605,7 @@ namespace llvm {
 
   namespace X86 {
     FastISel *createFastISel(MachineFunction &mf,
+                           MachineModuleInfo *mmi,
                            DenseMap<const Value *, unsigned> &,
                            DenseMap<const BasicBlock *, MachineBasicBlock *> &,
                            DenseMap<const AllocaInst *, int> &);