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Add support for the ARM 't' register constraint. And another testcase

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for the 'x' register constraint.

Part of rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134220 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher
2011-07-01 00:30:46 +00:00
parent e1bff38386
commit d5dc9eca2b
2 changed files with 25 additions and 0 deletions
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5
lib/Target/ARM/ARMISelLowering.cpp
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@@ -7484,6 +7484,7 @@ ARMTargetLowering::getConstraintType(const std::string &Constraint) const {
case 'w': return C_RegisterClass;
case 'h': return C_RegisterClass;
case 'x': return C_RegisterClass;
case 't': return C_RegisterClass;
}
} else if (Constraint.size() == 2) {
switch (Constraint[0]) {
@@ -7563,6 +7564,10 @@ ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
if (VT.getSizeInBits() == 128)
return RCPair(0U, ARM::QPR_8RegisterClass);
break;
case 't':
if (VT == MVT::f32)
return RCPair(0U, ARM::SPRRegisterClass);
break;
}
}
if (StringRef("{cc}").equals_lower(Constraint))