mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-04 06:09:05 +00:00
[x86] Add some mayLoad/hasSideEffects flags. Remove one that was already covered by a pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226562 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
a37512049c
commit
d624796bc6
@ -1212,6 +1212,7 @@ multiclass avx512_cmp_scalar<RegisterClass RC, X86MemOperand x86memop,
|
||||
def rri_alt : AVX512Ii8<0xC2, MRMSrcReg,
|
||||
(outs VK1:$dst), (ins RC:$src1, RC:$src2, i8imm:$cc),
|
||||
asm_alt, [], IIC_SSE_ALU_F32S_RR>, EVEX_4V;
|
||||
let mayLoad = 1 in
|
||||
def rmi_alt : AVX512Ii8<0xC2, MRMSrcMem,
|
||||
(outs VK1:$dst), (ins RC:$src1, x86memop:$src2, i8imm:$cc),
|
||||
asm_alt, [], IIC_SSE_ALU_F32P_RM>, EVEX_4V;
|
||||
@ -1406,6 +1407,7 @@ multiclass avx512_icmp_cc<bits<8> opc, string Suffix, SDNode OpNode,
|
||||
!strconcat("vpcmp", Suffix, "\t{$cc, $src2, $src1, $dst|",
|
||||
"$dst, $src1, $src2, $cc}"),
|
||||
[], IIC_SSE_ALU_F32P_RR>, EVEX_4V;
|
||||
let mayLoad = 1 in
|
||||
def rmi_alt : AVX512AIi8<opc, MRMSrcMem,
|
||||
(outs _.KRC:$dst), (ins _.RC:$src1, _.MemOp:$src2, i8imm:$cc),
|
||||
!strconcat("vpcmp", Suffix, "\t{$cc, $src2, $src1, $dst|",
|
||||
@ -1418,6 +1420,7 @@ multiclass avx512_icmp_cc<bits<8> opc, string Suffix, SDNode OpNode,
|
||||
"\t{$cc, $src2, $src1, $dst {${mask}}|",
|
||||
"$dst {${mask}}, $src1, $src2, $cc}"),
|
||||
[], IIC_SSE_ALU_F32P_RR>, EVEX_4V, EVEX_K;
|
||||
let mayLoad = 1 in
|
||||
def rmik_alt : AVX512AIi8<opc, MRMSrcMem,
|
||||
(outs _.KRC:$dst), (ins _.KRCWM:$mask, _.RC:$src1, _.MemOp:$src2,
|
||||
i8imm:$cc),
|
||||
@ -1431,7 +1434,6 @@ multiclass avx512_icmp_cc<bits<8> opc, string Suffix, SDNode OpNode,
|
||||
multiclass avx512_icmp_cc_rmb<bits<8> opc, string Suffix, SDNode OpNode,
|
||||
X86VectorVTInfo _> :
|
||||
avx512_icmp_cc<opc, Suffix, OpNode, _> {
|
||||
let mayLoad = 1 in {
|
||||
def rmib : AVX512AIi8<opc, MRMSrcMem,
|
||||
(outs _.KRC:$dst), (ins _.RC:$src1, _.ScalarMemOp:$src2,
|
||||
AVXCC:$cc),
|
||||
@ -1453,10 +1455,9 @@ multiclass avx512_icmp_cc_rmb<bits<8> opc, string Suffix, SDNode OpNode,
|
||||
(X86VBroadcast (_.ScalarLdFrag addr:$src2)),
|
||||
imm:$cc)))],
|
||||
IIC_SSE_ALU_F32P_RM>, EVEX_4V, EVEX_K, EVEX_B;
|
||||
}
|
||||
|
||||
// Accept explicit immediate argument form instead of comparison code.
|
||||
let isAsmParserOnly = 1, hasSideEffects = 0 in {
|
||||
let isAsmParserOnly = 1, hasSideEffects = 0, mayLoad = 1 in {
|
||||
def rmib_alt : AVX512AIi8<opc, MRMSrcMem,
|
||||
(outs _.KRC:$dst), (ins _.RC:$src1, _.ScalarMemOp:$src2,
|
||||
i8imm:$cc),
|
||||
@ -1528,6 +1529,7 @@ multiclass avx512_cmp_packed<RegisterClass KRC, RegisterClass RC,
|
||||
!strconcat("vcmp${cc}", suffix,
|
||||
"\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
|
||||
[(set KRC:$dst, (X86cmpm (vt RC:$src1), (vt RC:$src2), imm:$cc))], d>;
|
||||
let hasSideEffects = 0 in
|
||||
def rrib: AVX512PIi8<0xC2, MRMSrcReg,
|
||||
(outs KRC:$dst), (ins RC:$src1, RC:$src2, AVXCC:$cc),
|
||||
!strconcat("vcmp${cc}", suffix,
|
||||
@ -1546,6 +1548,7 @@ multiclass avx512_cmp_packed<RegisterClass KRC, RegisterClass RC,
|
||||
(outs KRC:$dst), (ins RC:$src1, RC:$src2, i8imm:$cc),
|
||||
!strconcat("vcmp", suffix,
|
||||
"\t{$cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc}"), [], d>;
|
||||
let mayLoad = 1 in
|
||||
def rmi_alt : AVX512PIi8<0xC2, MRMSrcMem,
|
||||
(outs KRC:$dst), (ins RC:$src1, x86memop:$src2, i8imm:$cc),
|
||||
!strconcat("vcmp", suffix,
|
||||
|
@ -2504,6 +2504,7 @@ multiclass sse12_cmp_packed<RegisterClass RC, X86MemOperand x86memop,
|
||||
def rri_alt : PIi8<0xC2, MRMSrcReg,
|
||||
(outs RC:$dst), (ins RC:$src1, RC:$src2, i8imm:$cc),
|
||||
asm_alt, [], itins.rr, d>, Sched<[WriteFAdd]>;
|
||||
let mayLoad = 1 in
|
||||
def rmi_alt : PIi8<0xC2, MRMSrcMem,
|
||||
(outs RC:$dst), (ins RC:$src1, x86memop:$src2, i8imm:$cc),
|
||||
asm_alt, [], itins.rm, d>,
|
||||
|
Loading…
Reference in New Issue
Block a user