It's an error to translate this:

%reg1025 = <sext> %reg1024
    ...
   %reg1026 = SUBREG_TO_REG 0, %reg1024, 4

into this:

   %reg1025 = <sext> %reg1024
    ...
   %reg1027 = EXTRACT_SUBREG %reg1025, 4
   %reg1026 = SUBREG_TO_REG 0, %reg1027, 4

The problem here is that SUBREG_TO_REG is there to assert that an implicit zext
occurs. It doesn't insert a zext instruction. If we allow the EXTRACT_SUBREG
here, it will give us the value after the <sext>, not the original value of
%reg1024 before <sext>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105741 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2010-06-09 19:00:55 +00:00
parent 1d451dff63
commit d64ba3ee62

View File

@ -118,6 +118,26 @@ bool OptimizeExts::OptimizeInstr(MachineInstr *MI, MachineBasicBlock *MBB,
continue;
}
// It's an error to translate this:
//
// %reg1025 = <sext> %reg1024
// ...
// %reg1026 = SUBREG_TO_REG 0, %reg1024, 4
//
// into this:
//
// %reg1025 = <sext> %reg1024
// ...
// %reg1027 = EXTRACT_SUBREG %reg1025, 4
// %reg1026 = SUBREG_TO_REG 0, %reg1027, 4
//
// The problem here is that SUBREG_TO_REG is there to assert that an
// implicit zext occurs. It doesn't insert a zext instruction. If we allow
// the EXTRACT_SUBREG here, it will give us the value after the <sext>,
// not the original value of %reg1024 before <sext>.
if (UseMI->getOpcode() == TargetOpcode::SUBREG_TO_REG)
continue;
MachineBasicBlock *UseMBB = UseMI->getParent();
if (UseMBB == MBB) {
// Local uses that come after the extension.