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Do not delete identity insert_subreg even if dest is virtual. Let later passes delete them. This avoids register scavenger complain.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85045 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2009-10-25 07:48:51 +00:00
parent f5fe5e4e79
commit d66f0015ad
1 changed files with 27 additions and 20 deletions
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47
lib/CodeGen/SimpleRegisterCoalescing.cpp
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@ -922,7 +922,7 @@ static void PropagateDeadness(LiveInterval &li, MachineInstr *CopyMI,
DefMI->getOperand(DeadIdx).setIsDead(); DefMI->getOperand(DeadIdx).setIsDead();
else else
DefMI->addOperand(MachineOperand::CreateReg(li.reg, DefMI->addOperand(MachineOperand::CreateReg(li.reg,
true, true, false, true)); /*def*/true, /*implicit*/true, /*kill*/false, /*dead*/true));
LRStart = li_->getNextSlot(LRStart); LRStart = li_->getNextSlot(LRStart);
} }
} }
@ -1853,7 +1853,7 @@ bool SimpleRegisterCoalescing::RangeIsDefinedByCopyFromReg(LiveInterval &li,
tii_->isMoveInstr(*DefMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) && tii_->isMoveInstr(*DefMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) &&
DstReg == li.reg && SrcReg == Reg) { DstReg == li.reg && SrcReg == Reg) {
// Cache computed info. // Cache computed info.
LR->valno->def = LR->start; LR->valno->def = LR->start;
LR->valno->setCopy(DefMI); LR->valno->setCopy(DefMI);
return true; return true;
} }
@ -2006,7 +2006,7 @@ bool SimpleRegisterCoalescing::SimpleJoin(LiveInterval &LHS, LiveInterval &RHS){
// RHS into, update the value number info for the LHS to indicate that the // RHS into, update the value number info for the LHS to indicate that the
// value number is defined where the RHS value number was. // value number is defined where the RHS value number was.
const VNInfo *VNI = RHS.getValNumInfo(0); const VNInfo *VNI = RHS.getValNumInfo(0);
LHSValNo->def = VNI->def; LHSValNo->def = VNI->def;
LHSValNo->setCopy(VNI->getCopy()); LHSValNo->setCopy(VNI->getCopy());
// Okay, the final step is to loop over the RHS live intervals, adding them to // Okay, the final step is to loop over the RHS live intervals, adding them to
@ -2489,8 +2489,7 @@ SimpleRegisterCoalescing::lastRegisterUse(LiveIndex Start,
MachineOperand &Use = I.getOperand(); MachineOperand &Use = I.getOperand();
MachineInstr *UseMI = Use.getParent(); MachineInstr *UseMI = Use.getParent();
unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx; unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx;
if (tii_->isMoveInstr(*UseMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) && if (tii_->isIdentityCopy(*UseMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx))
SrcReg == DstReg)
// Ignore identity copies. // Ignore identity copies.
continue; continue;
LiveIndex Idx = li_->getInstructionIndex(UseMI); LiveIndex Idx = li_->getInstructionIndex(UseMI);
@ -2516,8 +2515,7 @@ SimpleRegisterCoalescing::lastRegisterUse(LiveIndex Start,
// Ignore identity copies. // Ignore identity copies.
unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx; unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx;
if (!(tii_->isMoveInstr(*MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) && if (!tii_->isIdentityCopy(*MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx))
SrcReg == DstReg))
for (unsigned i = 0, NumOps = MI->getNumOperands(); i != NumOps; ++i) { for (unsigned i = 0, NumOps = MI->getNumOperands(); i != NumOps; ++i) {
MachineOperand &Use = MI->getOperand(i); MachineOperand &Use = MI->getOperand(i);
if (Use.isReg() && Use.isUse() && Use.getReg() && if (Use.isReg() && Use.isUse() && Use.getReg() &&
@ -2570,7 +2568,11 @@ void SimpleRegisterCoalescing::CalculateSpillWeights() {
for (MachineBasicBlock::const_iterator mii = MBB->begin(), mie = MBB->end(); for (MachineBasicBlock::const_iterator mii = MBB->begin(), mie = MBB->end();
mii != mie; ++mii) { mii != mie; ++mii) {
const MachineInstr *MI = mii; const MachineInstr *MI = mii;
if (tii_->isIdentityCopy(*MI)) unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx;
if (tii_->isIdentityCopy(*MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx))
continue;
if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF)
continue; continue;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
@ -2601,8 +2603,7 @@ void SimpleRegisterCoalescing::CalculateSpillWeights() {
float Weight = li_->getSpillWeight(HasDef, HasUse, loopDepth); float Weight = li_->getSpillWeight(HasDef, HasUse, loopDepth);
if (HasDef && isExiting) { if (HasDef && isExiting) {
// Looks like this is a loop count variable update. // Looks like this is a loop count variable update.
LiveIndex DefIdx = LiveIndex DefIdx = li_->getDefIndex(li_->getInstructionIndex(MI));
li_->getDefIndex(li_->getInstructionIndex(MI));
const LiveRange *DLR = const LiveRange *DLR =
li_->getInterval(Reg).getLiveRangeContaining(DefIdx); li_->getInterval(Reg).getLiveRangeContaining(DefIdx);
if (DLR->end > MBBEnd) if (DLR->end > MBBEnd)
@ -2704,27 +2705,34 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
MI->getOpcode() == TargetInstrInfo::SUBREG_TO_REG) && MI->getOpcode() == TargetInstrInfo::SUBREG_TO_REG) &&
"Unrecognized copy instruction"); "Unrecognized copy instruction");
DstReg = MI->getOperand(0).getReg(); DstReg = MI->getOperand(0).getReg();
// Do not delete subreg_to_reg, insert_subreg with undef source unless
// the definition is dead. e.g.
// %DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1
// or else the scavenger may complain. These will be eliminated by the
// rewriter or the subreg lowering pass.
if (TargetRegisterInfo::isPhysicalRegister(DstReg)) if (TargetRegisterInfo::isPhysicalRegister(DstReg))
// Do not delete extract_subreg, insert_subreg of physical // Don't delete extract_subreg of a physical register.
// registers unless the definition is dead. e.g. DoDelete = false;
// %DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1 else if (MI->getOpcode() == TargetInstrInfo::SUBREG_TO_REG ||
// or else the scavenger may complain. LowerSubregs will (MI->getOpcode() == TargetInstrInfo::INSERT_SUBREG &&
// change this to an IMPLICIT_DEF later. MI->getOperand(1).isUndef()))
DoDelete = false; DoDelete = false;
} }
if (MI->registerDefIsDead(DstReg)) { if (MI->registerDefIsDead(DstReg)) {
LiveInterval &li = li_->getInterval(DstReg); LiveInterval &li = li_->getInterval(DstReg);
if (!ShortenDeadCopySrcLiveRange(li, MI)) if (!ShortenDeadCopySrcLiveRange(li, MI))
ShortenDeadCopyLiveRange(li, MI); ShortenDeadCopyLiveRange(li, MI);
DoDelete = true; DoDelete = true;
} }
if (!DoDelete)
if (!DoDelete) {
mii = next(mii); mii = next(mii);
else { } else {
li_->RemoveMachineInstrFromMaps(MI); li_->RemoveMachineInstrFromMaps(MI);
mii = mbbi->erase(mii); mii = mbbi->erase(mii);
++numPeep;
} }
++numPeep;
continue; continue;
} }
@ -2762,8 +2770,7 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
} }
// If the move will be an identity move delete it // If the move will be an identity move delete it
bool isMove= tii_->isMoveInstr(*MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx); if (tii_->isIdentityCopy(*MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx)) {
if (isMove && SrcReg == DstReg) {
if (li_->hasInterval(SrcReg)) { if (li_->hasInterval(SrcReg)) {
LiveInterval &RegInt = li_->getInterval(SrcReg); LiveInterval &RegInt = li_->getInterval(SrcReg);
// If def of this move instruction is dead, remove its live range // If def of this move instruction is dead, remove its live range