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Make prolog align stack properly. Make epilog not touch any registers.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12183 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Brian Gaeke 2004-03-06 05:31:21 +00:00
parent a8b00cafc4
commit d69b3c58d3
2 changed files with 8 additions and 8 deletions
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8
lib/Target/Sparc/SparcRegisterInfo.cpp
View File

@ -71,15 +71,15 @@ void SparcV8RegisterInfo::emitPrologue(MachineFunction &MF) const {
// Eventually this should emit the correct save instruction based on the
// number of bytes in the frame. For now we just hardcode it.
BuildMI(MBB, MBB.begin(), V8::SAVEi, 2, V8::SP).addImm(-122).addReg(V8::SP);
BuildMI(MBB, MBB.begin(), V8::SAVEri, 2, V8::SP).addImm(-112).addReg(V8::SP);
}
void SparcV8RegisterInfo::emitEpilogue(MachineFunction &MF,
MachineBasicBlock &MBB) const {
MachineBasicBlock::iterator MBBI = prior(MBB.end());
assert(MBBI->getOpcode() == V8::JMPLi &&
"Can only put epilog before return instruction!");
BuildMI(MBB, MBBI, V8::RESTOREi, 2, V8::O0).addImm(0).addReg(V8::L7);
assert(MBBI->getOpcode() == V8::RETL &&
"Can only put epilog before 'retl' instruction!");
BuildMI(MBB, MBBI, V8::RESTORErr, 2, V8::G0).addReg(V8::G0).addReg(V8::G0);
}

8
lib/Target/SparcV8/SparcV8RegisterInfo.cpp
View File

@ -71,15 +71,15 @@ void SparcV8RegisterInfo::emitPrologue(MachineFunction &MF) const {
// Eventually this should emit the correct save instruction based on the
// number of bytes in the frame. For now we just hardcode it.
BuildMI(MBB, MBB.begin(), V8::SAVEi, 2, V8::SP).addImm(-122).addReg(V8::SP);
BuildMI(MBB, MBB.begin(), V8::SAVEri, 2, V8::SP).addImm(-112).addReg(V8::SP);
}
void SparcV8RegisterInfo::emitEpilogue(MachineFunction &MF,
MachineBasicBlock &MBB) const {
MachineBasicBlock::iterator MBBI = prior(MBB.end());
assert(MBBI->getOpcode() == V8::JMPLi &&
"Can only put epilog before return instruction!");
BuildMI(MBB, MBBI, V8::RESTOREi, 2, V8::O0).addImm(0).addReg(V8::L7);
assert(MBBI->getOpcode() == V8::RETL &&
"Can only put epilog before 'retl' instruction!");
BuildMI(MBB, MBBI, V8::RESTORErr, 2, V8::G0).addReg(V8::G0).addReg(V8::G0);
}