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Fill in the default predication bits for ARM unconditional branch.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118907 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2010-11-12 18:13:26 +00:00
parent 4252ffdef6
commit d75c3f136b
1 changed files with 1 additions and 0 deletions
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lib/Target/ARM/ARMInstrInfo.td
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@ -1381,6 +1381,7 @@ let isBranch = 1, isTerminator = 1 in {
def B : ABXI<0b1010, (outs), (ins brtarget:$target), IIC_Br,
"b\t$target", [(br bb:$target)]> {
bits<24> target;
let Inst{31-28} = 0b1110;
let Inst{23-0} = target;
}