From d77ddbc0ba4614f4c9ef548e82ba6bc68c586cb5 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 13 Oct 2006 20:40:42 +0000 Subject: [PATCH] remove some dead code git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30938 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrInfo.cpp | 33 --------------------------------- lib/Target/X86/X86InstrInfo.h | 10 ---------- 2 files changed, 43 deletions(-) diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index eb85abff10e..939b8691c43 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -239,39 +239,6 @@ MachineInstr *X86InstrInfo::commuteInstruction(MachineInstr *MI) const { } } - -void X86InstrInfo::insertGoto(MachineBasicBlock& MBB, - MachineBasicBlock& TMBB) const { - BuildMI(MBB, MBB.end(), X86::JMP, 1).addMBB(&TMBB); -} - -MachineBasicBlock::iterator -X86InstrInfo::reverseBranchCondition(MachineBasicBlock::iterator MI) const { - unsigned Opcode = MI->getOpcode(); - assert(isBranch(Opcode) && "MachineInstr must be a branch"); - unsigned ROpcode; - switch (Opcode) { - default: assert(0 && "Cannot reverse unconditional branches!"); - case X86::JB: ROpcode = X86::JAE; break; - case X86::JAE: ROpcode = X86::JB; break; - case X86::JE: ROpcode = X86::JNE; break; - case X86::JNE: ROpcode = X86::JE; break; - case X86::JBE: ROpcode = X86::JA; break; - case X86::JA: ROpcode = X86::JBE; break; - case X86::JS: ROpcode = X86::JNS; break; - case X86::JNS: ROpcode = X86::JS; break; - case X86::JP: ROpcode = X86::JNP; break; - case X86::JNP: ROpcode = X86::JP; break; - case X86::JL: ROpcode = X86::JGE; break; - case X86::JGE: ROpcode = X86::JL; break; - case X86::JLE: ROpcode = X86::JG; break; - case X86::JG: ROpcode = X86::JLE; break; - } - MachineBasicBlock* MBB = MI->getParent(); - MachineBasicBlock* TMBB = MI->getOperand(0).getMachineBasicBlock(); - return BuildMI(*MBB, MBB->erase(MI), ROpcode, 1).addMBB(TMBB); -} - const TargetRegisterClass *X86InstrInfo::getPointerRegClass() const { const X86Subtarget *Subtarget = &TM.getSubtarget(); if (Subtarget->is64Bit()) diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index 01b4cfffcc7..3e0694f8b3f 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -223,16 +223,6 @@ public: virtual MachineInstr *commuteInstruction(MachineInstr *MI) const; - /// Insert a goto (unconditional branch) sequence to TMBB, at the - /// end of MBB - virtual void insertGoto(MachineBasicBlock& MBB, - MachineBasicBlock& TMBB) const; - - /// Reverses the branch condition of the MachineInstr pointed by - /// MI. The instruction is replaced and the new MI is returned. - virtual MachineBasicBlock::iterator - reverseBranchCondition(MachineBasicBlock::iterator MI) const; - const TargetRegisterClass *getPointerRegClass() const; // getBaseOpcodeFor - This function returns the "base" X86 opcode for the