MC: Remove the copy of MCSchedModel in MCSubtargetInfo

`MCSchedModel` is large.  Make `MCSchedModel::GetDefaultSchedModel()`
return by-reference instead of by-value, so we can store a pointer in
`MCSubtargetInfo::CPUSchedModel` instead of a copy.

Note: since `MCSchedModel` is POD, this doesn't create a static
constructor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241947 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan P. N. Exon Smith 2015-07-10 22:13:43 +00:00
parent 722aa9573b
commit d819fac294
5 changed files with 46 additions and 30 deletions

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@ -224,25 +224,9 @@ struct MCSchedModel {
return &SchedClassTable[SchedClassIdx]; return &SchedClassTable[SchedClassIdx];
} }
// /\brief Returns a default initialized model. Used for unknown processors. /// Returns the default initialized model.
static MCSchedModel GetDefaultSchedModel() { static const MCSchedModel &GetDefaultSchedModel() { return Default; }
MCSchedModel Ret = { DefaultIssueWidth, static const MCSchedModel Default;
DefaultMicroOpBufferSize,
DefaultLoopMicroOpBufferSize,
DefaultLoadLatency,
DefaultHighLatency,
DefaultMispredictPenalty,
false,
true,
0,
nullptr,
nullptr,
0,
0,
nullptr
};
return Ret;
}
}; };
} // End llvm namespace } // End llvm namespace

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@ -37,7 +37,7 @@ class MCSubtargetInfo {
const MCWriteProcResEntry *WriteProcResTable; const MCWriteProcResEntry *WriteProcResTable;
const MCWriteLatencyEntry *WriteLatencyTable; const MCWriteLatencyEntry *WriteLatencyTable;
const MCReadAdvanceEntry *ReadAdvanceTable; const MCReadAdvanceEntry *ReadAdvanceTable;
MCSchedModel CPUSchedModel; const MCSchedModel *CPUSchedModel;
const InstrStage *Stages; // Instruction itinerary stages const InstrStage *Stages; // Instruction itinerary stages
const unsigned *OperandCycles; // Itinerary operand cycles const unsigned *OperandCycles; // Itinerary operand cycles
@ -99,11 +99,10 @@ public:
/// getSchedModelForCPU - Get the machine model of a CPU. /// getSchedModelForCPU - Get the machine model of a CPU.
/// ///
MCSchedModel getSchedModelForCPU(StringRef CPU) const; const MCSchedModel &getSchedModelForCPU(StringRef CPU) const;
/// getSchedModel - Get the machine model for this subtarget's CPU. /// Get the machine model for this subtarget's CPU.
/// const MCSchedModel &getSchedModel() const { return *CPUSchedModel; }
const MCSchedModel &getSchedModel() const { return CPUSchedModel; }
/// Return an iterator at the first process resource consumed by the given /// Return an iterator at the first process resource consumed by the given
/// scheduling class. /// scheduling class.

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@ -28,6 +28,7 @@ add_llvm_library(LLVMMC
MCObjectStreamer.cpp MCObjectStreamer.cpp
MCObjectWriter.cpp MCObjectWriter.cpp
MCRegisterInfo.cpp MCRegisterInfo.cpp
MCSchedule.cpp
MCSection.cpp MCSection.cpp
MCSectionCOFF.cpp MCSectionCOFF.cpp
MCSectionELF.cpp MCSectionELF.cpp

33
lib/MC/MCSchedule.cpp Normal file
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@ -0,0 +1,33 @@
//===- MCSchedule.cpp - Scheduling ------------------------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file defines the default scheduling model.
//
//===----------------------------------------------------------------------===//
#include "llvm/MC/MCSchedule.h"
using namespace llvm;
static_assert(std::is_pod<MCSchedModel>::value,
"We shouldn't have a static constructor here");
const MCSchedModel MCSchedModel::Default = {DefaultIssueWidth,
DefaultMicroOpBufferSize,
DefaultLoopMicroOpBufferSize,
DefaultLoadLatency,
DefaultHighLatency,
DefaultMispredictPenalty,
false,
true,
0,
nullptr,
nullptr,
0,
0,
nullptr};

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@ -29,9 +29,9 @@ MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) {
void void
MCSubtargetInfo::InitCPUSchedModel(StringRef CPU) { MCSubtargetInfo::InitCPUSchedModel(StringRef CPU) {
if (!CPU.empty()) if (!CPU.empty())
CPUSchedModel = getSchedModelForCPU(CPU); CPUSchedModel = &getSchedModelForCPU(CPU);
else else
CPUSchedModel = MCSchedModel::GetDefaultSchedModel(); CPUSchedModel = &MCSchedModel::GetDefaultSchedModel();
} }
void MCSubtargetInfo::InitMCSubtargetInfo( void MCSubtargetInfo::InitMCSubtargetInfo(
@ -82,8 +82,7 @@ FeatureBitset MCSubtargetInfo::ApplyFeatureFlag(StringRef FS) {
return FeatureBits; return FeatureBits;
} }
MCSchedModel const MCSchedModel &MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
assert(ProcSchedModels && "Processor machine model not available!"); assert(ProcSchedModels && "Processor machine model not available!");
unsigned NumProcs = ProcDesc.size(); unsigned NumProcs = ProcDesc.size();
@ -116,6 +115,6 @@ MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const {
/// Initialize an InstrItineraryData instance. /// Initialize an InstrItineraryData instance.
void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const { void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const {
InstrItins = InstrItins = InstrItineraryData(getSchedModel(), Stages, OperandCycles,
InstrItineraryData(CPUSchedModel, Stages, OperandCycles, ForwardingPaths); ForwardingPaths);
} }