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MC: Remove the copy of MCSchedModel in MCSubtargetInfo
`MCSchedModel` is large. Make `MCSchedModel::GetDefaultSchedModel()` return by-reference instead of by-value, so we can store a pointer in `MCSubtargetInfo::CPUSchedModel` instead of a copy. Note: since `MCSchedModel` is POD, this doesn't create a static constructor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241947 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -224,25 +224,9 @@ struct MCSchedModel {
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return &SchedClassTable[SchedClassIdx];
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return &SchedClassTable[SchedClassIdx];
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}
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}
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// /\brief Returns a default initialized model. Used for unknown processors.
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/// Returns the default initialized model.
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static MCSchedModel GetDefaultSchedModel() {
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static const MCSchedModel &GetDefaultSchedModel() { return Default; }
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MCSchedModel Ret = { DefaultIssueWidth,
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static const MCSchedModel Default;
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DefaultMicroOpBufferSize,
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DefaultLoopMicroOpBufferSize,
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DefaultLoadLatency,
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DefaultHighLatency,
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DefaultMispredictPenalty,
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false,
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true,
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0,
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nullptr,
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nullptr,
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0,
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0,
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nullptr
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};
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return Ret;
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}
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};
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};
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} // End llvm namespace
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} // End llvm namespace
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@ -37,7 +37,7 @@ class MCSubtargetInfo {
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const MCWriteProcResEntry *WriteProcResTable;
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const MCWriteProcResEntry *WriteProcResTable;
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const MCWriteLatencyEntry *WriteLatencyTable;
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const MCWriteLatencyEntry *WriteLatencyTable;
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const MCReadAdvanceEntry *ReadAdvanceTable;
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const MCReadAdvanceEntry *ReadAdvanceTable;
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MCSchedModel CPUSchedModel;
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const MCSchedModel *CPUSchedModel;
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const InstrStage *Stages; // Instruction itinerary stages
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const InstrStage *Stages; // Instruction itinerary stages
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const unsigned *OperandCycles; // Itinerary operand cycles
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const unsigned *OperandCycles; // Itinerary operand cycles
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@ -99,11 +99,10 @@ public:
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/// getSchedModelForCPU - Get the machine model of a CPU.
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/// getSchedModelForCPU - Get the machine model of a CPU.
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///
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///
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MCSchedModel getSchedModelForCPU(StringRef CPU) const;
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const MCSchedModel &getSchedModelForCPU(StringRef CPU) const;
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/// getSchedModel - Get the machine model for this subtarget's CPU.
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/// Get the machine model for this subtarget's CPU.
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///
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const MCSchedModel &getSchedModel() const { return *CPUSchedModel; }
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const MCSchedModel &getSchedModel() const { return CPUSchedModel; }
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/// Return an iterator at the first process resource consumed by the given
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/// Return an iterator at the first process resource consumed by the given
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/// scheduling class.
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/// scheduling class.
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@ -28,6 +28,7 @@ add_llvm_library(LLVMMC
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MCObjectStreamer.cpp
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MCObjectStreamer.cpp
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MCObjectWriter.cpp
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MCObjectWriter.cpp
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MCRegisterInfo.cpp
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MCRegisterInfo.cpp
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MCSchedule.cpp
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MCSection.cpp
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MCSection.cpp
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MCSectionCOFF.cpp
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MCSectionCOFF.cpp
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MCSectionELF.cpp
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MCSectionELF.cpp
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33
lib/MC/MCSchedule.cpp
Normal file
33
lib/MC/MCSchedule.cpp
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@ -0,0 +1,33 @@
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//===- MCSchedule.cpp - Scheduling ------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the default scheduling model.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/MC/MCSchedule.h"
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using namespace llvm;
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static_assert(std::is_pod<MCSchedModel>::value,
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"We shouldn't have a static constructor here");
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const MCSchedModel MCSchedModel::Default = {DefaultIssueWidth,
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DefaultMicroOpBufferSize,
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DefaultLoopMicroOpBufferSize,
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DefaultLoadLatency,
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DefaultHighLatency,
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DefaultMispredictPenalty,
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false,
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true,
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0,
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nullptr,
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nullptr,
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0,
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0,
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nullptr};
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@ -29,9 +29,9 @@ MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) {
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void
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void
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MCSubtargetInfo::InitCPUSchedModel(StringRef CPU) {
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MCSubtargetInfo::InitCPUSchedModel(StringRef CPU) {
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if (!CPU.empty())
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if (!CPU.empty())
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CPUSchedModel = getSchedModelForCPU(CPU);
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CPUSchedModel = &getSchedModelForCPU(CPU);
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else
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else
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CPUSchedModel = MCSchedModel::GetDefaultSchedModel();
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CPUSchedModel = &MCSchedModel::GetDefaultSchedModel();
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}
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}
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void MCSubtargetInfo::InitMCSubtargetInfo(
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void MCSubtargetInfo::InitMCSubtargetInfo(
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@ -82,8 +82,7 @@ FeatureBitset MCSubtargetInfo::ApplyFeatureFlag(StringRef FS) {
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return FeatureBits;
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return FeatureBits;
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}
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}
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MCSchedModel
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const MCSchedModel &MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
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MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
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assert(ProcSchedModels && "Processor machine model not available!");
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assert(ProcSchedModels && "Processor machine model not available!");
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unsigned NumProcs = ProcDesc.size();
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unsigned NumProcs = ProcDesc.size();
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@ -116,6 +115,6 @@ MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const {
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/// Initialize an InstrItineraryData instance.
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/// Initialize an InstrItineraryData instance.
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void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const {
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void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const {
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InstrItins =
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InstrItins = InstrItineraryData(getSchedModel(), Stages, OperandCycles,
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InstrItineraryData(CPUSchedModel, Stages, OperandCycles, ForwardingPaths);
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ForwardingPaths);
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}
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}
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