From d838fcd03d12e3a95084a0c53383b6eeb5f04a60 Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Thu, 26 Feb 2009 06:47:09 +0000
Subject: [PATCH] more notes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65507 91177308-0d34-0410-b5e6-96231b3b80d8
---
 docs/ReleaseNotes.html | 19 +++++++++++++++++--
 1 file changed, 17 insertions(+), 2 deletions(-)

diff --git a/docs/ReleaseNotes.html b/docs/ReleaseNotes.html
index 4f5db377af6..4892e0d4d0e 100644
--- a/docs/ReleaseNotes.html
+++ b/docs/ReleaseNotes.html
@@ -230,11 +230,11 @@ xcore backend!
 fortran on darwin!
 
 .ll parser rewrite.
-GCC inliner off.
+GCC inliner off, llvm handles always-inline.
 cmake mature?
 x86 backend FS/GS segment address spaces?
 nocapture
-memdep is faster / more aggressive.
+memdep (used by GVN and memcpyopt) is faster / more aggressive.
 how to write a backend doc docs/WritingAnLLVMBackend.html
 fastisel + exception handling
 vector widening <3 x float> -> <4 x float>
@@ -249,6 +249,21 @@ loop optimizer improves floating point induction variables
 llvm/Analysis/DebugInfo.h classes, llvm-gcc and clang and codegen use them.
 asmprinters seperate from targets for jits
 PBQP register allocator now supports register coalescing.
+JIT supports exceptions on linux/x86-64.
+integer overflow intrinsics for [us](add/sub/mul).  Supported on all targets,
+  but only generates efficient code on x86.
+X86 backend now supports -disable-mmx.
+noalias attribute on return value indicates that function returns new memory
+  (e.g. malloc).
+postalloc scheduler: anti dependence breaking?
+llvmc2 renamed to llvmc
+Jump threading more powerful: it is iterative, handles threading based on values
+  with fully redundant and partially redundant loads.
+LSR improvements?
+ARM debug info support?
+unit test framework based on Google Test.
+
+vector shift support + X86 backend.
 
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