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[NVPTX] enable NaryReassociate in NVPTX
Summary: We run NaryReassociate right after SLSR because SLSR enables many opportunities for NaryReassociate. For example, in nary-slsr.ll foo((a + b) + c); foo((a + b * 2) + c); foo((a + b * 3) + c); // 2 muls and 6 adds after SLSR: ab = a + b; foo(ab + c); ab2 = ab + b; foo(ab2 + c); ab3 = ab2 + b; foo(ab3 + c); // 6 adds after NaryReassociate: abc = (a + b) + c; foo(abc); ab2c = abc + b; foo(ab2c); ab3c = ab2c + b; foo(ab3c); // 4 adds Test Plan: nary-slsr.ll Reviewers: jholewinski, eliben Reviewed By: eliben Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D9066 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235688 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -179,6 +179,8 @@ void NVPTXPassConfig::addIRPasses() {
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addPass(createGVNPass());
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else
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addPass(createEarlyCSEPass());
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// Run NaryReassociate after EarlyCSE/GVN to be more effective.
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addPass(createNaryReassociatePass());
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}
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bool NVPTXPassConfig::addInstSelector() {
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2
test/Transforms/NaryReassociate/NVPTX/lit.local.cfg
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2
test/Transforms/NaryReassociate/NVPTX/lit.local.cfg
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@ -0,0 +1,2 @@
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if not 'NVPTX' in config.root.targets:
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config.unsupported = True
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47
test/Transforms/NaryReassociate/NVPTX/nary-slsr.ll
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47
test/Transforms/NaryReassociate/NVPTX/nary-slsr.ll
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@ -0,0 +1,47 @@
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; RUN: opt < %s -slsr -nary-reassociate -S | FileCheck %s
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix=PTX
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target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
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; foo((a + b) + c);
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; foo((a + b * 2) + c);
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; foo((a + b * 3) + c);
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; =>
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; abc = (a + b) + c;
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; foo(abc);
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; ab2c = abc + b;
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; foo(ab2c);
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; ab3c = ab2c + b;
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; foo(ab3c);
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define void @nary_reassociate_after_slsr(i32 %a, i32 %b, i32 %c) {
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; CHECK-LABEL: @nary_reassociate_after_slsr(
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; PTX-LABEL: .visible .func nary_reassociate_after_slsr(
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; PTX: ld.param.u32 [[b:%r[0-9]+]], [nary_reassociate_after_slsr_param_1];
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%ab = add i32 %a, %b
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%abc = add i32 %ab, %c
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call void @foo(i32 %abc)
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; CHECK: call void @foo(i32 %abc)
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; PTX: st.param.b32 [param0+0], [[abc:%r[0-9]+]];
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%b2 = shl i32 %b, 1
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%ab2 = add i32 %a, %b2
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%ab2c = add i32 %ab2, %c
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; CHECK-NEXT: %ab2c = add i32 %abc, %b
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; PTX: add.s32 [[ab2c:%r[0-9]+]], [[abc]], [[b]]
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call void @foo(i32 %ab2c)
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; CHECK-NEXT: call void @foo(i32 %ab2c)
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; PTX: st.param.b32 [param0+0], [[ab2c]];
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%b3 = mul i32 %b, 3
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%ab3 = add i32 %a, %b3
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%ab3c = add i32 %ab3, %c
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; CHECK-NEXT: %ab3c = add i32 %ab2c, %b
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; PTX: add.s32 [[ab3c:%r[0-9]+]], [[ab2c]], [[b]]
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call void @foo(i32 %ab3c)
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; CHECK-NEXT: call void @foo(i32 %ab3c)
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; PTX: st.param.b32 [param0+0], [[ab3c]];
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ret void
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}
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declare void @foo(i32)
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