diff --git a/lib/Target/NVPTX/NVPTX.td b/lib/Target/NVPTX/NVPTX.td index 93fabf61536..e27fd75c23f 100644 --- a/lib/Target/NVPTX/NVPTX.td +++ b/lib/Target/NVPTX/NVPTX.td @@ -32,10 +32,18 @@ def SM21 : SubtargetFeature<"sm_21", "SmVersion", "21", "Target SM 2.1">; def SM30 : SubtargetFeature<"sm_30", "SmVersion", "30", "Target SM 3.0">; +def SM32 : SubtargetFeature<"sm_32", "SmVersion", "32", + "Target SM 3.2">; def SM35 : SubtargetFeature<"sm_35", "SmVersion", "35", "Target SM 3.5">; +def SM37 : SubtargetFeature<"sm_37", "SmVersion", "37", + "Target SM 3.7">; def SM50 : SubtargetFeature<"sm_50", "SmVersion", "50", "Target SM 5.0">; +def SM52 : SubtargetFeature<"sm_52", "SmVersion", "52", + "Target SM 5.2">; +def SM53 : SubtargetFeature<"sm_53", "SmVersion", "53", + "Target SM 5.3">; // PTX Versions def PTX30 : SubtargetFeature<"ptx30", "PTXVersion", "30", @@ -46,6 +54,10 @@ def PTX32 : SubtargetFeature<"ptx32", "PTXVersion", "32", "Use PTX version 3.2">; def PTX40 : SubtargetFeature<"ptx40", "PTXVersion", "40", "Use PTX version 4.0">; +def PTX41 : SubtargetFeature<"ptx41", "PTXVersion", "41", + "Use PTX version 4.1">; +def PTX42 : SubtargetFeature<"ptx42", "PTXVersion", "42", + "Use PTX version 4.2">; //===----------------------------------------------------------------------===// // NVPTX supported processors. @@ -57,8 +69,12 @@ class Proc Features> def : Proc<"sm_20", [SM20]>; def : Proc<"sm_21", [SM21]>; def : Proc<"sm_30", [SM30]>; +def : Proc<"sm_32", [SM32]>; def : Proc<"sm_35", [SM35]>; +def : Proc<"sm_37", [SM37]>; def : Proc<"sm_50", [SM50]>; +def : Proc<"sm_52", [SM52]>; +def : Proc<"sm_53", [SM53]>; def NVPTXInstrInfo : InstrInfo { diff --git a/test/CodeGen/NVPTX/sm-version-32.ll b/test/CodeGen/NVPTX/sm-version-32.ll new file mode 100644 index 00000000000..b737f36a774 --- /dev/null +++ b/test/CodeGen/NVPTX/sm-version-32.ll @@ -0,0 +1,6 @@ +; RUN: llc < %s -march=nvptx -mcpu=sm_32 | FileCheck %s +; RUN: llc < %s -march=nvptx64 -mcpu=sm_32 | FileCheck %s + + +; CHECK: .target sm_32 + diff --git a/test/CodeGen/NVPTX/sm-version-37.ll b/test/CodeGen/NVPTX/sm-version-37.ll new file mode 100644 index 00000000000..957a3d95705 --- /dev/null +++ b/test/CodeGen/NVPTX/sm-version-37.ll @@ -0,0 +1,6 @@ +; RUN: llc < %s -march=nvptx -mcpu=sm_37 | FileCheck %s +; RUN: llc < %s -march=nvptx64 -mcpu=sm_37 | FileCheck %s + + +; CHECK: .target sm_37 + diff --git a/test/CodeGen/NVPTX/sm-version-52.ll b/test/CodeGen/NVPTX/sm-version-52.ll new file mode 100644 index 00000000000..9b8fc72b5a9 --- /dev/null +++ b/test/CodeGen/NVPTX/sm-version-52.ll @@ -0,0 +1,6 @@ +; RUN: llc < %s -march=nvptx -mcpu=sm_52 | FileCheck %s +; RUN: llc < %s -march=nvptx64 -mcpu=sm_52 | FileCheck %s + + +; CHECK: .target sm_52 + diff --git a/test/CodeGen/NVPTX/sm-version-53.ll b/test/CodeGen/NVPTX/sm-version-53.ll new file mode 100644 index 00000000000..f1b8e5bacf2 --- /dev/null +++ b/test/CodeGen/NVPTX/sm-version-53.ll @@ -0,0 +1,6 @@ +; RUN: llc < %s -march=nvptx -mcpu=sm_53 | FileCheck %s +; RUN: llc < %s -march=nvptx64 -mcpu=sm_53 | FileCheck %s + + +; CHECK: .target sm_53 +