mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-07-26 20:26:07 +00:00
code formatting improvements, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79165 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -572,13 +572,15 @@ void Emitter<CodeEmitter>::emitInstruction(
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unsigned char BaseOpcode = II->getBaseOpcodeFor(Desc);
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unsigned char BaseOpcode = II->getBaseOpcodeFor(Desc);
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switch (Desc->TSFlags & X86II::FormMask) {
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switch (Desc->TSFlags & X86II::FormMask) {
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default: llvm_unreachable("Unknown FormMask value in X86 MachineCodeEmitter!");
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default:
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llvm_unreachable("Unknown FormMask value in X86 MachineCodeEmitter!");
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case X86II::Pseudo:
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case X86II::Pseudo:
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// Remember the current PC offset, this is the PIC relocation
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// Remember the current PC offset, this is the PIC relocation
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// base address.
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// base address.
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switch (Opcode) {
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switch (Opcode) {
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default:
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default:
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llvm_unreachable("psuedo instructions should be removed before code emission");
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llvm_unreachable("psuedo instructions should be removed before code"
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" emission");
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break;
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break;
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case TargetInstrInfo::INLINEASM: {
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case TargetInstrInfo::INLINEASM: {
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// We allow inline assembler nodes with empty bodies - they can
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// We allow inline assembler nodes with empty bodies - they can
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@@ -649,36 +651,39 @@ void Emitter<CodeEmitter>::emitInstruction(
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}
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}
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break;
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break;
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case X86II::AddRegFrm:
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case X86II::AddRegFrm: {
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MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(CurOp++).getReg()));
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MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(CurOp++).getReg()));
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if (CurOp != NumOps) {
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if (CurOp == NumOps)
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const MachineOperand &MO1 = MI.getOperand(CurOp++);
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break;
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unsigned Size = X86InstrInfo::sizeOfImm(Desc);
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if (MO1.isImm())
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const MachineOperand &MO1 = MI.getOperand(CurOp++);
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emitConstant(MO1.getImm(), Size);
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unsigned Size = X86InstrInfo::sizeOfImm(Desc);
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else {
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if (MO1.isImm()) {
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unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
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emitConstant(MO1.getImm(), Size);
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: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
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break;
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if (Opcode == X86::MOV64ri64i32)
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rt = X86::reloc_absolute_word; // FIXME: add X86II flag?
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// This should not occur on Darwin for relocatable objects.
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if (Opcode == X86::MOV64ri)
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rt = X86::reloc_absolute_dword; // FIXME: add X86II flag?
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if (MO1.isGlobal()) {
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bool NeedStub = isa<Function>(MO1.getGlobal());
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bool Indirect = gvNeedsNonLazyPtr(MO1, TM);
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emitGlobalAddress(MO1.getGlobal(), rt, MO1.getOffset(), 0,
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NeedStub, Indirect);
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} else if (MO1.isSymbol())
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emitExternalSymbolAddress(MO1.getSymbolName(), rt);
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else if (MO1.isCPI())
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emitConstPoolAddress(MO1.getIndex(), rt);
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else if (MO1.isJTI())
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emitJumpTableAddress(MO1.getIndex(), rt);
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}
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}
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}
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unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
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: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
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if (Opcode == X86::MOV64ri64i32)
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rt = X86::reloc_absolute_word; // FIXME: add X86II flag?
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// This should not occur on Darwin for relocatable objects.
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if (Opcode == X86::MOV64ri)
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rt = X86::reloc_absolute_dword; // FIXME: add X86II flag?
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if (MO1.isGlobal()) {
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bool NeedStub = isa<Function>(MO1.getGlobal());
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bool Indirect = gvNeedsNonLazyPtr(MO1, TM);
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emitGlobalAddress(MO1.getGlobal(), rt, MO1.getOffset(), 0,
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NeedStub, Indirect);
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} else if (MO1.isSymbol())
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emitExternalSymbolAddress(MO1.getSymbolName(), rt);
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else if (MO1.isCPI())
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emitConstPoolAddress(MO1.getIndex(), rt);
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else if (MO1.isJTI())
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emitJumpTableAddress(MO1.getIndex(), rt);
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break;
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break;
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}
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case X86II::MRMDestReg: {
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case X86II::MRMDestReg: {
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MCE.emitByte(BaseOpcode);
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MCE.emitByte(BaseOpcode);
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@@ -686,7 +691,8 @@ void Emitter<CodeEmitter>::emitInstruction(
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getX86RegNum(MI.getOperand(CurOp+1).getReg()));
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getX86RegNum(MI.getOperand(CurOp+1).getReg()));
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CurOp += 2;
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CurOp += 2;
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if (CurOp != NumOps)
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if (CurOp != NumOps)
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emitConstant(MI.getOperand(CurOp++).getImm(), X86InstrInfo::sizeOfImm(Desc));
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emitConstant(MI.getOperand(CurOp++).getImm(),
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X86InstrInfo::sizeOfImm(Desc));
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break;
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break;
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}
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}
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case X86II::MRMDestMem: {
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case X86II::MRMDestMem: {
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@@ -696,7 +702,8 @@ void Emitter<CodeEmitter>::emitInstruction(
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.getReg()));
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.getReg()));
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CurOp += X86AddrNumOperands + 1;
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CurOp += X86AddrNumOperands + 1;
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if (CurOp != NumOps)
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if (CurOp != NumOps)
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emitConstant(MI.getOperand(CurOp++).getImm(), X86InstrInfo::sizeOfImm(Desc));
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emitConstant(MI.getOperand(CurOp++).getImm(),
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X86InstrInfo::sizeOfImm(Desc));
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break;
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break;
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}
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}
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@@ -759,29 +766,31 @@ void Emitter<CodeEmitter>::emitInstruction(
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(Desc->TSFlags & X86II::FormMask)-X86II::MRM0r);
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(Desc->TSFlags & X86II::FormMask)-X86II::MRM0r);
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}
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}
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if (CurOp != NumOps) {
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if (CurOp == NumOps)
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const MachineOperand &MO1 = MI.getOperand(CurOp++);
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break;
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unsigned Size = X86InstrInfo::sizeOfImm(Desc);
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if (MO1.isImm())
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const MachineOperand &MO1 = MI.getOperand(CurOp++);
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emitConstant(MO1.getImm(), Size);
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unsigned Size = X86InstrInfo::sizeOfImm(Desc);
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else {
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if (MO1.isImm()) {
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unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
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emitConstant(MO1.getImm(), Size);
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: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
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break;
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if (Opcode == X86::MOV64ri32)
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rt = X86::reloc_absolute_word_sext; // FIXME: add X86II flag?
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if (MO1.isGlobal()) {
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bool NeedStub = isa<Function>(MO1.getGlobal());
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bool Indirect = gvNeedsNonLazyPtr(MO1, TM);
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emitGlobalAddress(MO1.getGlobal(), rt, MO1.getOffset(), 0,
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NeedStub, Indirect);
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} else if (MO1.isSymbol())
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emitExternalSymbolAddress(MO1.getSymbolName(), rt);
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else if (MO1.isCPI())
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emitConstPoolAddress(MO1.getIndex(), rt);
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else if (MO1.isJTI())
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emitJumpTableAddress(MO1.getIndex(), rt);
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}
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}
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}
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unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
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: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
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if (Opcode == X86::MOV64ri32)
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rt = X86::reloc_absolute_word_sext; // FIXME: add X86II flag?
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if (MO1.isGlobal()) {
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bool NeedStub = isa<Function>(MO1.getGlobal());
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bool Indirect = gvNeedsNonLazyPtr(MO1, TM);
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emitGlobalAddress(MO1.getGlobal(), rt, MO1.getOffset(), 0,
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NeedStub, Indirect);
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} else if (MO1.isSymbol())
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emitExternalSymbolAddress(MO1.getSymbolName(), rt);
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else if (MO1.isCPI())
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emitConstPoolAddress(MO1.getIndex(), rt);
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else if (MO1.isJTI())
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emitJumpTableAddress(MO1.getIndex(), rt);
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break;
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break;
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}
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}
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@@ -798,29 +807,31 @@ void Emitter<CodeEmitter>::emitInstruction(
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PCAdj);
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PCAdj);
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CurOp += X86AddrNumOperands;
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CurOp += X86AddrNumOperands;
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if (CurOp != NumOps) {
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if (CurOp == NumOps)
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const MachineOperand &MO = MI.getOperand(CurOp++);
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break;
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unsigned Size = X86InstrInfo::sizeOfImm(Desc);
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if (MO.isImm())
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const MachineOperand &MO = MI.getOperand(CurOp++);
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emitConstant(MO.getImm(), Size);
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unsigned Size = X86InstrInfo::sizeOfImm(Desc);
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else {
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if (MO.isImm()) {
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unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
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emitConstant(MO.getImm(), Size);
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: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
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break;
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if (Opcode == X86::MOV64mi32)
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rt = X86::reloc_absolute_word_sext; // FIXME: add X86II flag?
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if (MO.isGlobal()) {
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bool NeedStub = isa<Function>(MO.getGlobal());
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bool Indirect = gvNeedsNonLazyPtr(MO, TM);
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emitGlobalAddress(MO.getGlobal(), rt, MO.getOffset(), 0,
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NeedStub, Indirect);
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} else if (MO.isSymbol())
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emitExternalSymbolAddress(MO.getSymbolName(), rt);
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else if (MO.isCPI())
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emitConstPoolAddress(MO.getIndex(), rt);
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else if (MO.isJTI())
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emitJumpTableAddress(MO.getIndex(), rt);
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}
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}
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}
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unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
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: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
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if (Opcode == X86::MOV64mi32)
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rt = X86::reloc_absolute_word_sext; // FIXME: add X86II flag?
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if (MO.isGlobal()) {
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bool NeedStub = isa<Function>(MO.getGlobal());
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bool Indirect = gvNeedsNonLazyPtr(MO, TM);
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emitGlobalAddress(MO.getGlobal(), rt, MO.getOffset(), 0,
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NeedStub, Indirect);
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} else if (MO.isSymbol())
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emitExternalSymbolAddress(MO.getSymbolName(), rt);
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else if (MO.isCPI())
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emitConstPoolAddress(MO.getIndex(), rt);
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else if (MO.isJTI())
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emitJumpTableAddress(MO.getIndex(), rt);
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break;
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break;
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}
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}
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