6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-07-26 05:25:47 +00:00
Code Issues Projects Releases Wiki Activity

code formatting improvements, no functionality change.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79165 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2009-08-16 02:36:40 +00:00
parent 0b2353f277
commit d8638babf9
1 changed files with 85 additions and 74 deletions
Download Patch File Download Diff File Expand all files Collapse all files

51
lib/Target/X86/X86CodeEmitter.cpp
View File

@@ -572,13 +572,15 @@ void Emitter<CodeEmitter>::emitInstruction(
unsigned char BaseOpcode = II->getBaseOpcodeFor(Desc);
switch (Desc->TSFlags & X86II::FormMask) {
default: llvm_unreachable("Unknown FormMask value in X86 MachineCodeEmitter!");
default:
llvm_unreachable("Unknown FormMask value in X86 MachineCodeEmitter!");
case X86II::Pseudo:
// Remember the current PC offset, this is the PIC relocation
// base address.
switch (Opcode) {
default:
llvm_unreachable("psuedo instructions should be removed before code emission");
llvm_unreachable("psuedo instructions should be removed before code"
" emission");
break;
case TargetInstrInfo::INLINEASM: {
// We allow inline assembler nodes with empty bodies - they can
@@ -649,15 +651,19 @@ void Emitter<CodeEmitter>::emitInstruction(
}
break;
case X86II::AddRegFrm:
case X86II::AddRegFrm: {
MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(CurOp++).getReg()));
if (CurOp != NumOps) {
if (CurOp == NumOps)
break;
const MachineOperand &MO1 = MI.getOperand(CurOp++);
unsigned Size = X86InstrInfo::sizeOfImm(Desc);
if (MO1.isImm())
if (MO1.isImm()) {
emitConstant(MO1.getImm(), Size);
else {
break;
}
unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
if (Opcode == X86::MOV64ri64i32)
@@ -676,9 +682,8 @@ void Emitter<CodeEmitter>::emitInstruction(
emitConstPoolAddress(MO1.getIndex(), rt);
else if (MO1.isJTI())
emitJumpTableAddress(MO1.getIndex(), rt);
}
}
break;
}
case X86II::MRMDestReg: {
MCE.emitByte(BaseOpcode);
@@ -686,7 +691,8 @@ void Emitter<CodeEmitter>::emitInstruction(
getX86RegNum(MI.getOperand(CurOp+1).getReg()));
CurOp += 2;
if (CurOp != NumOps)
emitConstant(MI.getOperand(CurOp++).getImm(), X86InstrInfo::sizeOfImm(Desc));
emitConstant(MI.getOperand(CurOp++).getImm(),
X86InstrInfo::sizeOfImm(Desc));
break;
}
case X86II::MRMDestMem: {
@@ -696,7 +702,8 @@ void Emitter<CodeEmitter>::emitInstruction(
.getReg()));
CurOp += X86AddrNumOperands + 1;
if (CurOp != NumOps)
emitConstant(MI.getOperand(CurOp++).getImm(), X86InstrInfo::sizeOfImm(Desc));
emitConstant(MI.getOperand(CurOp++).getImm(),
X86InstrInfo::sizeOfImm(Desc));
break;
}
@@ -759,12 +766,16 @@ void Emitter<CodeEmitter>::emitInstruction(
(Desc->TSFlags & X86II::FormMask)-X86II::MRM0r);
}
if (CurOp != NumOps) {
if (CurOp == NumOps)
break;
const MachineOperand &MO1 = MI.getOperand(CurOp++);
unsigned Size = X86InstrInfo::sizeOfImm(Desc);
if (MO1.isImm())
if (MO1.isImm()) {
emitConstant(MO1.getImm(), Size);
else {
break;
}
unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
if (Opcode == X86::MOV64ri32)
@@ -780,8 +791,6 @@ void Emitter<CodeEmitter>::emitInstruction(
emitConstPoolAddress(MO1.getIndex(), rt);
else if (MO1.isJTI())
emitJumpTableAddress(MO1.getIndex(), rt);
}
}
break;
}
@@ -798,12 +807,16 @@ void Emitter<CodeEmitter>::emitInstruction(
PCAdj);
CurOp += X86AddrNumOperands;
if (CurOp != NumOps) {
if (CurOp == NumOps)
break;
const MachineOperand &MO = MI.getOperand(CurOp++);
unsigned Size = X86InstrInfo::sizeOfImm(Desc);
if (MO.isImm())
if (MO.isImm()) {
emitConstant(MO.getImm(), Size);
else {
break;
}
unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
if (Opcode == X86::MOV64mi32)
@@ -819,8 +832,6 @@ void Emitter<CodeEmitter>::emitInstruction(
emitConstPoolAddress(MO.getIndex(), rt);
else if (MO.isJTI())
emitJumpTableAddress(MO.getIndex(), rt);
}
}
break;
}